The Disk Control Block - Samsung WA31273A Technical Manual

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Scratch Pad Area Control.
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Read/Write cache support.
5-2-1-3

The Disk Control Block

The SID-9501D Disk Control block manages the flow of data between the disk and the buffer. It is
capable of performing completely automated track read and write operations at a maximum data rate
of 80 Mbits/sec in dual bit NRZ mode or 160 Mbits/sec in byte wide NRZ mode. Many flexible
features and elements of automation have been incorporated to complement the automation contributed
by the Host and Buffer blocks.
The Disk Control block consists of the programmable sequencer (Disk Sequencer), automatic
CDR/data split field processing, disk FIFO, fault tolerant sync detect logic, and other support logic.
The WCS sequencer contains a 31-by-2 byte programmable SRAM and associated control logic,
which is programmed by the user, to automatically control all single track format, read, and write
operations. From within the sequencer micro program, the Disk Control block can automatically deal
with such real time functions as defect skipping, servo burst data splitting, branching on critical buffer
status, address verification, and data compare operations. Once the Disk Sequencer is started, it
executes each word in logical order. At the completion of the current instruction word, it either
continues to the next instruction, continues to execute some other instruction based upon an internal or
external condition having been met, or stops. During instruction execution or while stopped, registers
can be accessed by the embedded microprocessor to obtain status information reflecting the Disk
Sequencer operations taking place.
In addition to the flexible Disk Sequencer, the Disk control block contains many other features which
are available to satisfy diverse requirements. These include:
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Support for optimized zero latency read operations.
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Disk Transfer Length register monitoring in Disk Sequencer.
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Support for Headerless Format.
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160 Mbps 8 bits / 80 Mbps Dual bit NRZ Data Processing.
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Index counter for power management command support.
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Embedded Servo Field Skipping.
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Automatic time-out support when waiting for Sync, Index, Sector, and End of Servo burst to
relieve microprocessor of overhead associated with managing time outs.
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34 Byte Disk FIFO.
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Automatic Split Field Processing for CDR.
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Automatic timeout with two-revolution timer
WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-9
Disk Drive Operation