Sharp PC-4741 Service Manual page 31

--------~~~~~~c~-------------------------------------------------------------
SIGNAL NAME ,:,
+HOSTRESET
'J , - \ , - , .
GND
,
'
110'
GND ;:;.'"
RESERVED
GND
-HOST lOW
GND
1'1
·P.-··
~,_,
GND
" O.
RESERVEIDID.ilK, '
, 0'
+HOSTALE
o
RESERVEDIDRO
o
GND
o
+HOSTIROI4
-HOST 1016
-HOSTPDIAG
+HOST AO, AI, A2
o
-HOSTCSO
o
-HOSTCSI
o
-HOST SLVlACT
GND
o
+5VLOGIC
+5VMOTOR
GND
-XT/AT
PIN
01
, ' " ~R.eset~~fg~nal
frolt1'
the Host system which is active low during
power up
and inactive thereafter.
o
03-181 ;
..
'
"
2Ground
~'etwe~_~ the drive and the Host. :<;~,-_
'" '_ ,
e
bit
bi~dfrectiorial
data bus between
tile
-host ahcfthe"drive. The /owe"t'-a bits~- HDO-HD7, "are
4S_~d' for:r~gi§tef~&
ECG access. All 16 bits are used: far data transfers. These are
tri~state,UFli3':
\o'{ith 24
mAdriv~:capability.
For XT. only bits 0-7 are used.
20
j '
An unusS:d pin::lClipped on the drive and plugged on the cable. Used to guarantee:'_.correct,
- . ; cirienfa1lbitof
thSi'cable. ': i.;" ' :
23
Wr~e,s!rpbe,ttT.:rising
edge of whichc,locks data from the host data bus, HDO throughHD15:
into a re9ts.ter
orthe
data regisfe:r'dfthe-drive:';" -.. : -, " . '(',
24:."
Ground between=the drive and the-ho'st. ' '
" J . ' , - '
!
~,",~,
1
25
:8~ad: strobe';:w~ich when low enables data from a register or thf)!, datfl reg'i~ter
:oi,tiiiidri.Y8:
ontothe host dilta bus, HDO through HDI5,. The rising edge of -HOST IOFH,ilcheidatafrom
"";,tt.(edri'{e,-~ttne,iiQst. :~.:
""')_,":'.-', _.
',~;,,~.
__
:-(,~
26 I'"
27
28
29
30
31
32
34
35,33,36
37
38
39
40
41
42
43
44
'G~9und ,b~1W~en-~he drive and the host.
-, '
"DAK,DMA Acknowledge, Used for DMA transfers on Xl".
' "
...... .
.. 'i
Host Address' Latch Enable. A signal us~ -to qualitY~the- address lines: This -signafls 'p~eser;1~iy
not used by the drive. ' . , ' .,' ' '
-DRO DMA Request Used for DMA transfers on XT. . , , '
Ground between the drive
_~nd
the host. - ' " ; ','
Interrupt to the Host system: :eHabfecf
onl~i
when the
driv!?
is selected, and tile hqst activates
the -lEN bit in the Digital Output register. When the' "':'IEN bit is inactive, or the drive is not
selected, this output in a high impedance state, regardless;'6f :the- 'state of"tfie(IRQ: bit. The
interrupt is
set
when the IRQ bit is set by the drive CPU. IRQ is reset to zero by a Host read of
the Status register or a write to the command register. This
sjgtJ~J~-_~ ~j~s~~te J.i-"-~"wit~
B rna
drive capacity.
Indication to the Host system that the 16 bit
dat~
..
r,~gi,$.t,er.has:b,~.em-
aqdre$Set;!
-fln9Jh~,lhe
drive is prepared to send or receive a 16 bit data word. This -'i!J.~ js.Jri~state li.n_e--with _24--mA
drive capacity. ,','
Passed diagnostic. Output by the drive if it is, strap~e~ -in 1be slave mode. Input
to'
the 'drive if it
is strapped in the master mode. This low true signal indicates to a m,aster 't~a~ the: ~Iave has
passed its internal diagnostic
comm~nq. Thj~ Ii.n~
is il
t~i
state line with 1'0 mA drive
c~patiility.
Bit binary coded address used to select the individ!Jall'egisters in the task file.
Chip select decoded from the hO'st addreSS -bu'€!:, Us'etJ to'-select some of the Host accessible
registers.
fi
!
Chip select decoded from the Host a.:rdress b,us,.,
US,~d
to select three of the regi*ers'ln the
Task File, '" " , , " ' , ' "
0 ,
Signal from the drive used either to drive ~I); aC,tlye: l:-~D whenever the disk is being accessed
or as an indication of a second drive present. When -ACTIVE, this signal is active low when
the drive is busy and has a drive capability of 20 mao When -SLAVE; PRESENT, .. ilis an
indication of the presence of a
sec~nd
drive when 10,w . . In.
this:,st~te,
it has a- drive cctp'aQilfty of
10 mAopen drain. ' ; . - ,-, _,,:'
I ' . ' . , : .. , : , ' .
;! ,':,
:_.1;" ,
Ground between the drive and the host.
-"j
+5V ±1 0% regulated DC power
+5V ±1 0% DC power (unregulated)
.... " " ",
GND Return
..
Selectable for XT or AT compatible interface.
"r '",
J '
-30-