Appendix A: Hspice And Quantum Channel Designer/Ibis-Ami Correlation Results; Transmitter Correlation; Correlation Methodology - Xilinx virtex-5 fpga User Manual

HSPICE and Quantum Channel
Designer/IBIS-AMI Correlation Results
This appendix describes the correlation of the IBIS-AMI models for Virtex®-5 FPGA GTP
transceivers with the HSPICE models. Simulation results are presented for a range of
simulation cases and operating corners.

Transmitter Correlation

This section outlines the correlation methodology and gives a summary of correlation
results.

Correlation Methodology

The IBIS-AMI (analog and algorithmic) model was simulated into several different loads to
verify output voltage, edge rate, equalization, and reflection behavior. These loads
consisted of a 6-inch wline with three different impedances, terminated into an ideal
differential impedance of 100 . Three differential wline impedances were used:
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A comprehensive set of correlation results include:
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A more comprehensive subset of correlation results include:
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Virtex-5 FPGA GTP Transceiver SIS Kit (IBIS-AMI)
UG587 (v1.1) June 21, 2012
100 (ideal match)
50 (overloaded driver)
150 (underloaded driver)
Eight power levels (0 mV, 400 mV, 600 mV, 800 mV, 900 mV, 1,000 mV, 1,050 mV and
1,100 mV)
Eight equalization settings ranging from 0%–52% de-emphasis
Three operating corners:
• Slow (SS)
• Typical (TT)
• Fast (FF)
Three test conditions (50 , 100 , and 150 transmission lines)
Three power levels (400 mV, 800 mV, and 1,100 mV)
Three equalization settings (0%, 18.5%, and 52% de-emphasis)
Three operating corners:
• Slow (SS)
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Appendix A
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