Digital I/O Power-Up State; Changing Dio Power-Up State To Pulled Low; Figure 4-12. Dio Channel Configured For High Dio Power-Up State With External Load - National Instruments DAQ PCI-6023E User Manual

Chapter 4 Signal Connections

Digital I/O Power-up State

Changing DIO Power-up State to Pulled Low

PCI-6023E/6024E/6025E User Manual
(PCI-6025E Only)
The PCI-6025E contains bias resistors that control the state of the digital
I/O lines PA<0..7>,PB<0..7>,PC<0..7> at power up. Each digital I/O line
is configured as an input, pulled high by a 100 k bias resistor.
You can change individual lines from pulled up to pulled down by adding
your own external resistors. This section describes the procedure.
Each DIO line is pulled to V
resistor. To pull a specific line low, connect between that line and ground
a pull-down resistor (R
VDC. The DIO lines provide a maximum of 2.5 mA at 3.7 V in the high
state. Using the largest possible resistor ensures that you do not use more
current than necessary to perform the pull-down task.
However, make sure the resistor's value is not so large that leakage current
from the DIO line along with the current from the 100 k pull-up resistor
drives the voltage at the resistor above a TTL-low level of 0.4 VDC. Figure
4-12 shows the DIO configuration for high DIO power-up state.
Board
82C55

Figure 4-12. DIO Channel Configured for High DIO Power-up State with External Load

Example:
A given DIO line is pulled high at power up. To pull it low on power up with
an external resistor, follow these steps:
1. Install a load (R
L
greater the current consumption and the lower the voltage.
(approximately +5 VDC) with a 100 k
cc
) whose value will give you a maximum of 0.4
L
+5 V
100 k
GND
). Remember that the smaller the resistance, the
4-24
Digital I/O Line
R
L
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