Power-On State; I/O Connector Pinout - National Instruments PCI-6601 User Manual

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Filter Setting
5 μs
1 μs
500 ns
100 ns
Programmable setting
with period of clock = t
Note
The digital filters on the NI 660x devices are not enabled by default.

Power-On State

I/O Connector Pinout

© National Instruments
are t
or shorter. A pulse with a width between these two ranges may or
fltrclk
may not pass, depending on the phase of the pulse with respect to the filter
clock timebase.
Table 3-1 summarizes the properties of the different filter settings.
Table 3-1. Filter Settings
Pulse Width Passed
5 μs
1 μs
500 ns
100 ns
2*t
fltrclk
fltrclk
You individually configure the filter setting for each PFI line. The filters are
useful to maintain signal integrity. They can prevent measurement errors
caused by noise, crosstalk, or transmission line effects.
For more information about using the digital filters on your device, refer to
the NI-DAQmx Help.
The PFI lines are weakly pulled down within the NI-TIO ASIC, and the
RTSI lines are weakly pulled high. Connections for pulling up the PFI lines
or for stronger pull-down connections must be made external to the
NI 660x. These connections affect the drive strength of NI 660x devices
when the lines pulled up or down are used as outputs.
Figure 3-2 shows the pinout of the NI 6601. Figure 3-3 shows the pinout of
the NI 6602/6608. The descriptions beside each pin are in the following
format: Signal Name / DIO Context / Counter Context (Default).
2.5 μs
500 ns
250 ns
50 ns
t
fltrclk
3-3
Chapter 3
Signal Connections
Pulse Width Blocked
NI 660x User Manual

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