Pci Ide Connectors (J8G2, Primary And J6G1, Secondary) - Intel D815EEA Technical Product Specification

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Intel Desktop Board D815EEA Technical Product Specification
Table 43.

PCI IDE Connectors (J8G2, Primary and J6G1, Secondary)

Pin Signal Name
1 Reset IDE
3 Data 7
5 Data 6
7 Data 5
9 Data 4
11 Data 3
13 Data 2
15 Data 1
17 Data 0
19 Ground
21 DDRQ0 [DDRQ1]
23 I/O Write#
25 I/O Read#
27 IOCHRDY
29 DDACK0# [DDACK1#]
31 IRQ 14 [IRQ 15]
33 DAG1 (Address 1)
35 DAG0 (Address 0)
37 Chip Select 1P# [Chip Select 1S#]
39 Activity#
Note: Signal names in brackets ([ ]) are for the secondary IDE connector.
68
Pin Signal Name
2 Ground
4 Data 8
6 Data 9
8 Data 10
10 Data 11
12 Data 12
14 Data 13
16 Data 14
18 Data 15
20 Key
22 Ground
24 Ground
26 Ground
28 P_ALE (Cable Select pull-up)
30 Ground
32 Reserved
34 GPIO_DMA66_Detect_Pri (GPIO_DMA66_Detect_Sec)
36 DAG2 (Address 2)
38 Chip Select 3P# [Chip Select 3S#]
40 Ground