Agp Universal Connector - Intel D815EEA Technical Product Specification

1.8.3 AGP Universal Connector

The AGP universal connector supports either:
•
Graphics Performance Accelerator (GPA) cards with 133 MHz SDRAM display cache
•
AGP add-in cards with either 3.3 V or 1.5 V I/O
For information about
The location of the AGP universal connector
The signal names of the AGP universal connector
1.8.3.1 Graphics Performance Accelerator (GPA) Support
The Intel 815E GMCH display cache is a single channel 32-bit wide SDRAM interface. The 4 MB
display cache resides on a GPA card that plugs into the AGP connector. The BIOS detects a GPA
card if present in the AGP port and initializes it as display cache memory. When a GPA card is
initialized, the BIOS allocates 1 MB of system memory to support the internal display device
operation.
1.8.3.2 Dynamic Video Memory Technology (DVMT)
DVMT enables enhanced graphics and memory performance through Direct AGP, and highly
efficient memory utilization. DVMT ensures the most efficient use of all available memory for
maximum 2D/3D graphic performance. DVMT is implemented on the D815EEA board with a
GPA (Graphics Performance Accelerator) card installed in the AGP port.
NOTE
In earlier documentation, the GPA card was referred to as the AGP Inline Memory Module
(AIMM).
DVMT technology uses 1 MB of system physical memory for compatibility with legacy
applications. An example of this would be when using VGA graphics under DOS. Once loaded,
the operating system and graphics drivers allocate the buffers needed for performing graphics
functions. When the 4 MB GPA card is installed, the Z-buffer and GDI data are managed directly
from this dedicated graphics memory thereby avoiding operating system memory manager calls
and improving performance.
At system BIOS POST, the BIOS displays either the amount of physical memory allocated for
display cache or the size of the GPA card (4 MB) if installed. Operating systems such as
†
Windows NT 4.0 and Windows
memory possible based on the system memory configuration.
Refer to
Figure 11, page 63
Table 41, page 66
†
2000 may display the maximum amount of frame buffer
Product Description
31