Denon AVR-E200 Service Manual page 101

ADV7623 Hardware Manual
Location Mnemonic
68 MCLK_IN
69 SCLK_IN
70 AP5_IN
71 AP4_IN
72 DGNDIO
73 DVDDIO
74 AP3_IN
75 AP2_IN
76 AP1_IN
77 AP0_IN
78 SDATA
79 SCL
80 DGND
81 DVDD
82 INT1
(AMUTE1)
83 INT2
(AMUTE2)
84 INT_TX
85 DGNDIO
86 DVDDIO
Rev. 0 – March 2010
Type
Digital Input Audio Reference Clock. 128 × N × fs with
N = 1, 2, 3, or 4. Set to 128 × sampling
frequency (fs), 256 × fs, 384 × fs, or 512 ×
fs. Supports 1.8 V to 3.3 V CMOS logic
levels.
Digital Input I2S Audio Clock. Supports CMOS logic
levels from 1.8 V to 3.3 V.
Digital Input Audio Input Port 5. CMOS logic levels
from 1.8 V to 3.3 V.
Digital Input Audio Input Port 4. CMOS logic levels
from 1.8 V to 3.3 V.
Ground Ground for DVDDIO
Power Digital I/O supply voltage (3.3 V)
Digital Input Audio Input Port 3. CMOS logic levels
from 1.8 V to 3.3 V.
Digital Input Audio Input Port 2. CMOS logic levels
from 1.8 V to 3.3 V.
Digital Input Audio Input Port 1. CMOS logic levels
from 1.8 V to 3.3 V.
Digital Input Audio Input Port 0. CMOS logic levels
from 1.8 V to 3.3 V.
Digital I/O I2C port serial data input/output pin. SDA
is the data line for the control port.
Digital Input I2C port serial clock input. SCL is the clock
line for the control port.
Ground Ground for DVDD
Power Digital supply voltage (1.8 V)
Digital Output Interrupt pin, can be active low or active
high. When status bits change, this pin is
triggered. The events that trigger an
interrupt are under user control. This pin
can also output an audio mute signal
Digital Output Interrupt pin, can be active low or active
high. When status bits change, this pin is
triggered. The events that trigger an
interrupt are under user control. This pin
can also output an audio mute signal.
I2C LSB selection.
Digital Output Interrupt. Open drain. A 2 kΩ pull-up
resistor to the microcontroller I/O supply is
recommended.
Ground Ground for DVDDIO
Power Digital I/O supply voltage (3.3 V)
20
101
Description
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