Marantz SR6003 Service Manual page 81

Av surround receiver
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Pin
Port Name
No
58 P06/AN1/DA0
59 VSS/AVSS
60 P07/AN0/DA1
61 VREF
62 VCC/AVCC
63 P37/SSO
64 P35/SCL/SSCK
IC11 : M3087BFLK [SR5003 : MAIN] / M3087BFL [SR6003 : MAIN]
M
3
2
C
8 /
7
G
o r
u
p
(
M
3
2
C
8 /
, 7
M
3
2
1.5 Pin Assignment
Figures 1.3 to 1.5 show pin assignments (top view).
P1
0
/ D
8
109
P0
/ D
/ AN0
7
7
7
110
P0
/ D
/ AN0
6
6
6
111
P0
/ D
/ AN0
5
5
5
112
P0
/ D
/ AN0
4
4
4
113
P11
4
114
P11
/ INPC1
/ OUTC1
3
3
3
115
2 (12)
P11
116
P11
/ INPC1
/ OUTC1
/ ISCLK1
1
1
1
117
(13)
P11
0
118
P0
3
/ D
3
/ AN0
3
119
P0
/ D
/ AN0
2
2
2
120
P0
/ D
/ AN0
1
1
1
121
P0
/ D
/ AN0
0
0
0
122
P15
/ AN15
/ CTS6 / RTS6
123
7
7
P15
/ AN15
/ CLK6
6
6
124
P15
/ AN15
/ RxD6
5
5
125
P15
4
/ AN15
4
/ TxD6
126
P15
/ AN15
/ CTS5 / RTS5
3
3
127
P15
/ AN15
/ ISRxD0 / RxD5
2
2
128
P15
/ AN15
/ ISCLK0 / CLK5
1
1
129
V
130
SS
P15
/ AN15
/ ISTxD0 / TxD5
0
0
131
V
CC1
132
P10
7
/ AN
7
/ KI
3
/ RTP3
3
133
P10
/ AN
/ KI
/ RTP3
6
6
2
2
134
P10
/ AN
/ KI
/ RTP3
5
5
1
1
135
P10
/ AN
/ KI
/ RTP3
4
4
0
0
136
P10
/ AN
/ RTP1
137
3
3
3
P10
/ AN
/ RTP1
2
2
2
138
P10
/ AN
/ RTP1
1
1
1
139
AV
SS
140
P10
/ AN
/ RTP1
0
0
0
141
V
REF
142
AV
CC
143
P9
/ ADTRG / RxD4 / SCL4 / STxD4
144
7
NOTES:
1. P9
/ ANEX1 / TxD4 / SDA4 / SRxD4 / CAN1
6
2. P9
/ TB2
/ TxD3 / SDA3 / SRxD3 / OUTC2
2
IN
I/O
Use
Name
I/O
I
I_5V_CH5
I
I
GND
I/O
I
I_5V_CH6
I
M
3
I
2
C
8 /
+5VH
7
G
o r
u
p
I
I
+5VH
I/O
I/O HDMI_SDA
1.3 Block Diagram
I/O
SCL CPU_SCL
Figure 1.1 shows a block diagram of the M32C/87 group (M32C/87, M32C/87A, M32C/87B) microcomputer.
Port P0
Peripheral Functions
Three-Phase Motor Control Circuit
Time Measurement: 8 channels
Wave Generating: 16 channels
Communication Functions:
Clock Synchronous Serial I/O,
UART,
HDLC Data Processing,
IEBus,
Clock Synchronous Variable
C
8 /
7
, A
M
3
2
C
8 /
7
) B
Length Serial I/O
Port P14
NOTES:
1. Ports P11 to P15 are provided in the 144-pin package only.
2. Included in the 144-pin package only. 26 inputs maximum in the 100-pin package.
3. 6 channes available in the 100-pin package.
4. 10 channes available in the 100-pin package.
5. 1 channel is included in M32C/87A. No channel is included in M32C/87B.
<
>
V
CC2
Figure 1.1 M32C/87 Group (M32C/87, M32C/87A, M32C/87B) Block Diagram
M32C/87 Group
(M32C/87,M32C/87A,M32C/87B)
R
e
. v
1
0 .
1
A
u
. g
2
, 9
R
E
J
0
3
B
0
1
2
7
0 -
1
0
1
<
>
V
CC1
OUT
/ IE
/ ISTxD2
0
OUT
PortSetup
Act.
Init
-
-
Pull down to GND
-
-
GND
-
-
Pull down to GND
(
M
3
2
C
8 /
, 7
M
3
2
-
C
8 /
7
, A
-
M
3
+5V
2
C
8 /
7
-
-
+5V
-
H
HDMI Devices Control
-
H
Communication to Main CPU
8
8
8
8
Port P1
Port P2
Port P3
<
>
V
CC2
A/D Converter:
1 circuit
Timer (16 bits)
Standard: 10 inputs
Timer A: 5 channels
Maximum: 34 inputs
Timer B: 6 channels
UART/Clock Synchronous Serial I/O:
7 channels
Watchdog Timer (15 bits)
X/Y Converter:
16 bits x 16 bits
D/A Converter:
8 bits x 2 circuits
CAN Module: 2 channels
Intelligent I/O
R0H
(4)
R1H
A0
A1
FB
SB
<
>
<
>
V
V
CC1
CC2
Port P15
Port P11
Port P12
7
8
5
8
(Note 1)
72
P4
/ CS3 / A
4
20
71
P4
/ CS2 / A
5
21
70
P4
/ CS1 / A
6
22
69
P4
/ CS0 / A
7
23
68
P12
5
67
P12
6
66
P12
7
65
P5
/ WRL / WR
0
64
P5
/ WRH / BHE
1
63
P5
/ RD
2
62
P5
/ CLK
/ BCLK / ALE
3
OUT
61
P13
/ OUTC2
0
4
60
P13
/ OUTC2
1
5
59
V
CC2
58
P13
/ OUTC2
2
6
57
V
SS
56
P13
/ OUTC2
3
3
55
P5
/ HLDA / ALE
4
54
P5
/ HOLD
5
53
P5
/ ALE
6
52
P5
7
/ RDY
51
P13
/ OUTC2
/ ISTxD2 / IE
4
0
50
P13
/ OUTC2
/ ISRxD2 / IE
5
2
49
P13
/ OUTC2
/ ISCLK2
6
1
48
P13
/ OUTC2
7
7
47
P6
/ CTS0 / RTS0 / SS0 / RTP0
0
46
P6
/ CLK0 / RTP0
1
1
45
P6
2
/ RxD0 / SCL0 / STxD0 / IrDA
44
P6
/ TxD0 / SDA0 / SRxD0 / IrDA
3
Page 4
2
0
0
5
f o
7
6
43
P6
/ CTS1 / RTS1 / SS1 / OUTC2
4
42
P6
/ CLK1
5
41
V
SS
40
P6
/ RxD1 / SCL1 / STxD1
6
39
V
CC1
38
P6
/ TxD1 / SDA1 / SRxD1
7
0 (11,14)
37
P7
109
Note
) B
8
8
8
Port P4
Port P5
Port P6
<
>
V
CC1
Clock Generation Circuit
X
- X
IN
OUT
X
- X
CIN
COUT
(2)
On-chip Oscillator
PLL Frequency Synthesizer
(3)
DMAC
DMACII
CRC Calculation Circuit (CCITT):
(5)
16
12
5
X
+X
+X
+1
M32C/80 series CPU Core
Memory
R0L
FLG
ROM
INTB
R1L
R2
ISP
R3
USP
RAM
PC
SVF
1. Overview
SVP
Multiplier
VCT
Port P13
8
OUT
IN
0
IN
OUT
/ ISCLK2
1
1. Overview

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