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IC DESCRIPTION - 7/8 (HD6417034AF112QFP) - 1/4
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3 7 63 1515 0
Pin No.
Pin Name
_____
IRQ6
1
TP14
PB14
_____
IRQ7
2
TP15
PB15
3
VSS
4 ~ 11
AD0 ~ AD7
12
VSS
13, 14
AD8, AD9
15
VCC
16 ~ 21
AD10 ~ AD15
22
VSS
A0
23
____
HBS
24 ~ 30
A1 ~ A7
31
VSS
32 ~ 39
A8 ~ A15
40
VSS
41, 42
A16, A17
TE
L 13942296513
43
VCC
44 ~ 47
A18 ~ A21
___
48
CS0
_____
CASH
49
___
CS1
___
50
CS2
_____
CASL
51
___
CS3
52
VSS
TIOCA0
53
PA0
___
CS4
____
RAS
54
PA1
____
CS5
TIOCB0
www
55
PA2
____
CS6
.
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I/O
I
Interrupt request 6.
O
Timing pattern output 14. Timing pattern output pins.
I/O
Port B: 16-bit input/output pins. Input or output can be selected individually for each bit.
I
Interrupt request 7.
O
Timing pattern output 15. Timing pattern output pins.
I/O
Port B: 16-bit input/output pins. Input or output can be selected individually for each bit.
–
Ground
I/O
Data bus
–
Ground
I/O
Data bus
–
Power.
I/O
Data bus
–
Ground
Address bus
O
Upper/lower byte strobe: Upper and lower byte strobe signals. (Also used as WRH and A0.)
O
Address bus
–
Ground
O
Address bus
–
Ground
O
Address bus
–
Power.
O
Address bus
O
Chip select 0. Chip select signals for accessing external memory and devices.
Column address strobe high. DRAM column address strobe timing signal. Output to access the
O
upper eight data bits.
Chip select 1. Chip select signals for accessing external memory and devices.
O
Chip select 2. Chip select signals for accessing external memory and devices.
Column address strobe low. DRAM column address strobe timing. Output to access the lower
O
eight data bits.
Chip select 3. Chip select signals for accessing external memory and devices.
–
Ground
ITU input capture/output compare (channel 0). Input capture or output compare pins.
I/O
Port A. 16-bit input/output pins. Input or output can be selected individually for each bit.
O
Chip select 4. Chip select signals for accessing external memory and devices.
Row address strobe. DRAM row-address strobe timing signal.
I/O
Port A. 16-bit input/output pins. Input or output can be selected individually for each bit.
O
Chip select 5. Chip select signals for accessing external memory and devices.
I/O
ITU input capture/output compare (channel 0). Input capture or output compare pins.
Port A. 16-bit input/output pins. Input or output can be selected individually for each bit.
x
ao
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y
O
Chip select 6. Chip select signals for accessing external memory and devices.
i
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2 9
8
Description
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