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IC DESCRIPTION - 1/8 (SSI33P3721)-1/2
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Pin No.
Pin Name
1
DVDRFP
2
DVDRFN
3
PD1
4
PD2
5
A2
6
B2
7
C2
8
D2
9
CP
10
CN
11
D
12
C
13
B
14
A
15
F
16
E
17
CDTE
18
CEIN
TE
L 13942296513
19
CE1
20
VNB
21
DVDRD
22
DVDLD
23
CDPD
24
CDLD
___________
25
LDON
26
VC
27
VCI
28
VPB
29
MIRR
30
MP
31
MB
______________
32
FDCHG
33
MLPF2
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34
MLPF1
35
MIN
.
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I/O
I
RF SIGNAL INPUTS: Differential RF signal attenuator input pins.
I
I
CD PHOTO DETECTOR INTERFACE INPUTS: Inputs from the CD photo detector outputs.
I
I
I
PHOTO DETECTOR NTERFACE INPUTS: AC coupled inputs for the DPD from the main
I
beam Photo detector matrix outputs.
I
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between
–
CN.
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between
–
CP.
I
I
PHOTO DETECTOR INTERFACE INPUTS: Inputs from the main beam Photo detector matrix
I
outputs.
I
I
CD TRACKING ERROR INPUTS: Inverted(F) and non-inverted(E) inputs of the OP-Amp for
I
the CD tracking error.
–
CD TRACKING: E-F Opamp output for feed back.
I
CD CENTER ERROR INPUT: Inverted input of the OP-Amp for the CD center error.
CENTER ERROR OPAMP OUTPUT: CEIN Opamp output for feedback.
I
–
Ground pin for the servo block.
I
APC INPUT: DVD APC input pin from the monitor photo diode.
O
APC OUTPUT: DVD APC output pin to control the laser power.
I
APC INPUT: CD APC input pin from the monitor photo diode.
O
APC OUTPUT: CD APC output pin to control the laser power.
I
APC OUTPUT ON/OFF: APC output control pin. A low level activates LD output.(open high)
REFERENCE VOLTAGE OUTPUT: This pin provides the internal DC bias reference voltage
–
(+2.5 V fix). Output impedance is less than 50 ohm.
–
REFERENCE VOLTAGE INPUT : DC bias voltage input for servo output reference.
Power supply pin for the servo block
–
O
MIRROR DETECT OUTPUT: Mirror detect comparator output. Pseudo CMOS output.
–
MIRR SIGNAL PEAK HOLD PIN: The external capacitance is connected to VPB.
–
MIRR SIGNAL BOTTOM HOLD PIN: The external capacitance is connected to VPB.
LOW IMPEDANCE ENABLE: TTL compatible input pin that activates the FDCHG switches.
I
A low level activates the switches and the falling edge of the internal FDCHG triggers the fast
decay for the MIRR bottom hold circuit.(open high)
–
MIRR SIGNAL LPF PIN: The external capacitance is connected to VPB.
–
MIRR SIGNAL LPF PIN: The external capacitance is connected to VPB.
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RF SIGNAL INPUT FOR MIRROR: AC coupled inputs for the mirror dection circuit from pull-
I
i
in signal output (PI).
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Description
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