Signal Processing System - Sony HDW-F500 Maintenance Manual

Overall Block Diagram

7-1. Signal Processing System

HD SDI
S/P
IN
INPUT MONITOR
OUT
SDTI IN S/P
HKDV-506A(1/2)
CO-
HD SDI OUT P/S
PROCESSOR
HD SDI OUT CO-
P/S
WITH CHARA PROCESSOR
CO-
SDTI OUT P/S
PROCESSOR
HKDV-506A(2/2)
IC107,307
ANALOG AUDIO IN
GAIN
CONT.
IC1329
AES/EBU
AES/EBU IN x 2
DECODER
IC1329
AES/EBU
AES/EBU OUT x 2
ENCODER
IC900
L
AUDIO MONITOR OUT D/A
R
HEAD PHONE
IC500,700
ANALOG AUDIO OUT
D/A
7-2
INPUT/DUB
CO-
PROCESSOR
VIDEO
SEL
CO-
PROCESSOR
AUDIO
SEL
INPUT CHECK
DI F- 9 1
IC931
IC601
VFS
VIDEO
PROCESSOR
VFS
FIFO
IC532
IC309
VFS
HKDV 501A
-
(Refer to Page 7-5.)
IC702,703
IC815 IC901,902
IC1302,1306,1307
IC201,303
A/D
IC1104,1110
RATE
CONV.
IC1109,1113
MEMORY
IC201 IC101
4:2:2
VFS
3:1:1
MEMORY
MEMORY
IC1501
3:1:1
VSP
4:2:2
HKDV
- 5 0 2
HKDV-507/507D
(Refer to Page 7-4.)
IC710
RATE
CONV.
IC815
RATE
BIT PACK
CONV.
20
AUDIO
DATA
PROCESSOR
IC811
JOG
AUDIO
PROCESSOR
RATE
CONV.
APR- 4 9
MEMORY
IC301
BRR
ODD
ENC
EVEN
BRR
ENC
IC304
MEMORY
FOR FIELD EDIT
FOR DUBBING
IC1301
IC1101
POST
CONCEAL
FILTER
MEMORY
MEMORY
CONCEAL
MEMORY
ADV
/CONF.
24
MEMORY
IC815
BIT PACK
24 20
24 20
IC905
BRR
DEC
MEMORY
MEMORY
IC911
BRR
DEC
BRR
DEC
MEMORY
MEMORY
BRR
DEC
HDW-F500E MMP1