Pin Description; Block Diagram - Onkyo TX-NR801/E Service Manual

IC BLOCK DIAGRAMS AND DESCRIPTIONS
Q604 MX29LV320AT/B(32Mbit CMOS Flash memor

BLOCK DIAGRAM

WE
OE
WP
RESET
BYTE
A0~A20
BLOCK DIAGRAM
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
MX29LV320AT/B
A8
9
A19
10
A20
11
WE
12
RESET
13
NC
14
WP/ACC
15
RY/BY
16
A18
17
A17
18
A7
19
A6
20
A5
21
A4
22
A3
23
A2
24
A1
y)
CONTROL
PROGRAM/ERASE
INPUT
HIGH VOLTAGE
LOGIC
MX29LV320AT/B
ADDRESS
LATCH
AND
BUFFER
Y-PASS GATE
SENSE
AMPLIFIER
I/O BUFFER
Q0-Q15/A-1

PIN DESCRIPTION

A16
48
BYTE
47
GND
46
Q15/A-1
45
Q7
44
Q14
43
Q6
42
Q13
41
Q5
40
Q12
39
Q4
38
VCC
37
Q11
36
Q3
35
Q10
34
Q2
33
Q9
32
Q1
31
Q8
30
Q0
29
OE
28
GND
27
CE
26
A0
25
51
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
FLASH
ARRAY
ARRAY
SOURCE
HV
COMMAND
DATA
DECODER
PGM
DATA
HV
COMMAND
DATA LATCH
PROGRAM
DATA LATCH
SYMBOL PIN NAME
A0~A20 Address Input
Q0~Q14 Data Input/Output
Q15/A-1 Q15:Data Input/Output,word mode
A-1:LSB Address Input,byte mode
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
BYTE Word/Byte Selection Pin
RESET Hardware Reset Pin/Sector Protect Unlock
RY/BY Read/Busy output
VCC Power Supply Pin (+5V)
WP/ACC Hardware Write Protect/Acceleration Pin
GND Ground Pin
TX-NR901