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• VIDEO BOARD IC505 CL680T-D1 (MPEG VIDEO/AUDIO DECODER, VIDEO SIGNAL PROCESSOR)
Pin No.
Pin Name
1
NC
2
VSS
3
CD-BCK
4
CD-DATA
5
CD-LRCK
6
CD-C2PO
7 to 9
NC
10 to 15
MD0 to MD5
16
VSS
17
MD6
18
VDD3
19
MD7
20
VSS
21
MD8
22
VDD3
23 to 28
MD9 to MD14
29
MD15
30 to 36
NC
37
MCE
38
MWE
TE
L 13942296513
39
VSS
40
CAS
41
VDD3
42
RAS0
43
RAS1
44, 45
MA10, MA9
46
MA8
47
VSS
48
MA7
49
VDD3
50 to 52
MA6 to MA4
53
VSS
54
MA3
55
VDD3
56 to 58
MA2 to MA0
59
PGIO7
60
RESET
61
VDDMAX-IN
62 to 64
NC
65
AGND-DAC
66
AVDD-DAC
www
67
COMPOS OUT
68
AGND-DAC
69
Y-OUT
.
70
AVDD-DAC
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I/O
O
Not used (open)
—
Ground terminal
I
CD decode bit clock signal (2.8224 MHz) input from the CXD3068Q (IC101)
I
CD decode data input from the CXD3068Q (IC101)
I
CD decode L/R sampling clock signal (44.1 kHz) input from the CXD3068Q (IC101)
I
CD decode C2 error data input from the CXD3068Q (IC101)
O
Not used (open)
I/O
Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510)
—
Ground terminal
I/O
Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510)
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510)
—
Ground terminal
I/O
Two-way data bus with the D-RAM (IC507) Data output to the program ROM (IC510)
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the D-RAM (IC507) Data output to the program ROM (IC510)
I/O
Two-way data bus with the D-RAM (IC507)
O
Not used (open)
O
Chip enable signal output to the program ROM (IC510)
O
Write enable signal output to the D-RAM (IC507)
—
Ground terminal
O
Column address strobe signal output to the D-RAM (IC507)
—
Power supply terminal (+3.3V)
O
Row address strobe signal output to the D-RAM (IC507)
O
Row address strobe signal output terminal Not used (open)
O
Address signal output to the program ROM (IC510)
O
Address signal output to the D-RAM (IC507) and program ROM (IC510)
—
Ground terminal
O
Address signal output to the D-RAM (IC507) and program ROM (IC510)
—
Power supply terminal (+3.3V)
O
Address signal output to the D-RAM (IC507) and program ROM (IC510)
—
Ground terminal
O
Address signal output to the D-RAM (IC507) and program ROM (IC510)
—
Power supply terminal (+3.3V)
O
Address signal output to the D-RAM (IC507) and program ROM (IC510)
I/O
Not used (open)
I
Reset signal input from the video CD controller (IC502) "L": reset
I
Fix the maximum input voltage each input terminal and in/out terminal
O
Not used (open)
—
Ground terminal (for D/A converter)
—
Power supply terminal (+3.3V) (for D/A converter)
O
Composite video signal output terminal Not used (open)
x
ao
u163
—
Ground terminal (for D/A converter)
y
O
Luminance video signal output to the Y amplifier (IC303)
i
—
Power supply terminal (+3.3V) (for D/A converter)
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2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
HCD-VM330AV
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
59
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