Sony HCD-VM330AV Service Manual page 56

Compact disc deck receiver
Table of Contents

Advertisement

HCD-VM330AV
QQ
3 7 63 1515 0
Pin No.
Pin Name
45
AVSS0
46
IGEN
47
AVDD0
48
ASYO
49
ASYI
50
RFAC
51
AVSS1
52
CLTV
53
FILO
54
FILI
55
PCO
56
AVDD1
57
BIAS
58
VCTL
59
V16M
60
VPCO
61
DVDD2
62
ASYE
63
MD2
TE
L 13942296513
64
DOUT
65
LRCK
66
PCMD
67
BCLK
68
EMPH
69
XTSL
70
DVSS2
71
XTAI
72
XTAO
73
SOUT
74
SOCK
75
XOLT
76
SQSO
77
SQCK
78
SCSY
79
SBSO
80
EXCK
www
.
56
http://www.xiaoyu163.com
I/O
Ground terminal (analog system)
I
Stabilized current input for operational amplifiers
Power supply terminal (+3.3V) (analog system)
O
EFM full-swing output terminal
I
Asymmetry comparator voltage input terminal
I
EFM signal input from the CXA2581N (IC103)
Ground terminal (analog system)
I
Internal VCO control voltage input
O
Filter output for master PLL
I
Filter input for master PLL
O
Charge pump output for master PLL
Power supply terminal (+3.3V) (analog system)
I
Asymmetry circuit constant current input terminal
I
VCO control voltage input terminal for the wideband EFM PLL Not used (fixed at "H")
O
VCO oscillation output terminal for the wideband EFM PLL Not used (open)
O
Charge pump output terminal for the wideband EFM PLL Not used (open)
Power supply terminal (+3.3V) (digital system)
Asymmetry circuit on/off control signal input terminal "L": off, "H": on
I
Not used (fixed at "H")
Digital out on/off control signal input from terminal
I
"L": digital out off, "H": digital out on Not used (fixed at "H")
O
Digital audio signal output to the OPTICAL OUT (IC361)
O
L/R sampling clock signal (44.1 kHz) output to the CL680T (IC505)
O
Serial data output to the CL680T (IC505)
O
Bit clock signal (2.8224 MHz) output to the CL680T (IC505)
"L" is output when playback disc is emphasis off
O
"H" is output when playback disc is emphasis on Not used (open)
System clock frequency setting signal input from the video CD controller (IC502)
I
"L": 16.9344 MHz, "H": 33.8688MHz
Ground terminal (digital system)
I
System clock (33.8688 MHz) input from the D/A converter (IC509)
O
System clock output terminal (33.8688 MHz) Not used (open)
O
Serial data output terminal Not used (open)
O
Serial data reading clock signal output terminal Not used (open)
O
Serial data latch pulse signal output terminal Not used (open)
O
Subcode Q data output to the video CD controller (IC502)
I
Subcode Q data reading clock signal input from the video CD controller (IC502)
I
Input terminal for resynchronism of guard subcode sync (S0+S1) Not used (fixed at "L")
O
Subcode serial data output terminal Not used (open)
I
Subcode serial data reading clock signal input terminal Not used (open)
x
ao
y
i
http://www.xiaoyu163.com
8
Description
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9

Advertisement

Table of Contents
loading

Table of Contents