NEC FP1355 Service Manual page 39

Factory mode
y^2
4H b11T YHTT
x^2
Coil b21L XHL
x^2 E-(y^3+y^4+y^5+y^6)
b31TL S3HTL
x^2 Ey^4
b41TL PQHTL
y^2
4V c11T YVTT
x^2
Coil c21L XVL
x^2 E-(y^3+y^4+y^5+y^6)
c31TL S3VTL
x^2 Ey^4
c41TL PQVTL
User & Factory mode
4H Coil a11 H-CONVERGENCE
4V Coil a12 V-CONVERGENCE
(4) Block diagram
Fig. 20 shows the block diagram of the DDCC circuit.
The components 4H_DC(pin 6), 4H_SC(pin 61), 4V_DC(pin 8) and 4V_SC(pin 60) supplied
from IC601(CP267P151=uPD61882BGC) to 4H-Coil and 4V-Coil are output, the dynamic
component (4H_DC, 4V_DC) is amplified with IC6A1(TL084), and the static component
(4H_SC, 4V_SC) is amplified with IC6A2(KIA4558).
DCC(pin 7) output from IC601 (CP267P151=uPD61882BGC) and DEFL_+3.3V(pin 3)
output from IC602 (TA48M033F) are respectively the reference voltage of Op-
Amp(IC6A1:TL084) that amplifies the above dynamic component (4H_DC, 4V_DC) and the
reference voltage of Op-Amp(IC6A2:KIA4558) that amplifies the static component (4H_SC,
4V_SC).
On each of 4H and 4V, the waveform added with the dynamic component and static com-
ponent is input to IC8A1 pin 3 and pin 4 (STK391-110) allow the specified current to flow to
each convergence compensation coil.
y^2
b11B YHTB
x^2
b21R XHR
x^2 E-(-y^3+y^4+y^5+y^6)
b31TR S3HTR
x^2 Ey^4
b41TR PQHTR
y^2
c11B YVTB
x^2
c21R XVR
x^2 E-(-y^3+y^4+y^5+y^6)
c31TR S3VTR
x^2 Ey^4
c41TR PQVTR
DC
DC
Table 5
1 - 33
y
b12T YHJT
x^2 E-(-y^3+y^4-y^5+y^6)
b31BL S3HBL
x^2 Ey^4
b41BL PQHBL
y
c12T YVJT
x^2 E-(-y^3+y^4-y^5+y^6)
c31BL S3VBL
x^2 Ey^4
c41BL PQVBL
y
b12B YHJB
x^2 E-(-y^3+y^4-y^5+y^6)
b31BR S3HBR
x^2 Ey^4
b41BR PQHBR
y
c12B YVJB
x^2 E-(-y^3+y^4-y^5+y^6)
c31BR S3VBR
x^2 Ey^4
c41BR PQVBR