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I²C-bus autosync deflection controller for PC monitors
Two different modes of operation can be chosen for the
EW output waveform via control bit FHMULT:
1. Mode 1
Horizontal size is controlled via register HSIZE and
causes a DC shift at the EWDRV output. The complete
waveform is also multiplied internally by a signal propor-
tional to the line frequency [which is detected via the
current at HREF (pin 28)]. This mode is to be used for
driving EW diode modulator stage which require a volt-
age proportional to the line frequency.
2. Mode 2
The EW drive waveform does not track with the line
frequency. This mode is to be used for driving EW modu-
lators which require a voltage independent of the line
frequency.
Output stage for asymmetric correction waveforms
[ASCOR (pin 20)]
This output is designed as a voltage output for superim-
posed waveforms of vertical parabola and sawtooth. The
amplitude and polarity of both signals can be change by
registers HPARAL and HPINBAL via the I²C-bus.
Application hint: The TDA4856 offers two possibilities to
control registers HPINBAL and HPARAL.
1. Control bit ACD = 1
The two registers now control the horizontal phase by
means of internal modulation of the PLL2 horizontal
phase control. The ASCOR output (pin 20) can be left
unused, but it will always provide an output signal be-
cause the ASCOR output stage is not influenced by the
control bit ACD.
2. Control bit ACD = 0
The internal modulation via PLL2 is disconnected. In
order to obtain the required effect on the screen, pin
ASCOR must now be fed to the DC amplifier which con-
trols the DC shift of the horizontal deflection. This option
is useful for applications which already use a DC shift
transformer.
If the tube does not need HPINBAL and HPARAL, then pin
ASCOR can be used for other purposes, i.e. for a simple
dynamic convergence.
Dynamic focus section [FOCUS (pin 32)]
This section generates a complete drive signal for dynamic
focus applications. The amplitude of the horizontal parabola
is internally stabilized, thus it is independent of the horizon-
tal frequency. The amplitude can be adjusted via register
HFOCUS. Changing horizontal size may require a correc-
tion of HFOCUS. To compensate for the delay in external
focus amplifiers a 'pre-correction' for the phase of the hori-
zontal parabola has been implemented. The amount of this
pre-correction can be adjusted via register HFOCAD. The
amplitude of the vertical parabola is independent of fre-
quency and tracks with all vertical adjustments. The ampli-
tude can be adjusted via register VFOCUS.
FOCUS (pin 32) is designed as a voltage output for the
superimposed vertical and horizontal parabolas.
B+ control function block
The B+ control function block of the TDA4856 consists of
an Operational Transconductance Amplifier (OTA), a volt-
age comparator, a flip-flop and a discharge circuit. This
configuration allows easy applications for differnet B+ con-
trol concepts. See also Application Note AN96052: "B+
converter Topologies for Horizontal Deflection and EHT with
TDA4855/58".
G
ENERAL DESCRIPTION
The non-inverting input of the OTA is connected internally
to a high precision reference voltage. The inverting input is
connected to BIN (pin 5). An internal clamping circuit limits
the maximum positive output voltage of OTA.
The output itself is connected to BOP (pin 3) and to the
inverting input of the voltage comparator.
The non-inverting input of the voltage comparator can be
accessed via BSENS (pin 4).
B+ drive pulses are generated by an internal flip-flop and
fed to BDRV (pin 6) via an open-collector output stage.
This flip-flop is set at the rising edge of the signal at HDRV
(pin 8). The falling edge of the output signal at BDRV has a
defined delay of t
d(BDRV)
When the voltage at BSENS exceeds the voltage at BOP,
the voltage comparator output resets the flip-flop and,
therefore, the open-collector stage at BDRV is floating again.
65
TDA4857
to the rising edge of the HDRV pulse.
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