Attention (Attn); Reset (Rst); Data Bus (Db: 7-0, Parity); Bus Phases - Adaptec ACB-5500 User Manual

51/4" winchester disk controller scsi to st506
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4.1.1.8
ATTENTION (ATTN)
ATTN is an Initiator-driven signal indicating the ATTENTION condi-
tion.
ATTN is a request from the Initiator to transmit a message
to the ACB-5500.
4.1.1.9
RESET (RST)
RST is an "or-tied" signal indicating the RESET condition.
The
ACB-55~~
never initiates a RESET condition.
4.1.1.1~
DATA BUS (DB:
7-~,
PARITY)
Eight data bit signals, plus a parity bit signal, comprise the
DATA BUS.
DB(7)
is the most significant bit and has the highest
priority during arbitration.
Significance and priority decrease
with decreasing bit number with the least significant being
DB (") •
Each of the eight data signals DB(7) through DB(0) is uniquely
assigned as a Target
or Initiator bus address
(i.e.,
DEVICE
1.0.).
The Device ID is set in an ACB-5500 by jumpers AI, A2,
and A4.
Data
parity,
DB(P),
is odd.
The ACB-5500 always generates
correct bus parity for inbound transfers.
A jumper is installed
to enable the ACB-5500 to check outbound parity for those systems
that support parity.
All Initiators must support parity if the
ACB-5500 parity check is enabled.
4.1.2
BUS PHASES
The bus has eight
distinct operational phases and cannot be in
more than one phase s imul taneously.
Deta i led phase informati on
and timing specifications are contained in the ANSI X3T9.2 SCSI
Specification.
0
BUS FREE
0
ARBITRATION
0
SELECTION
0
RESELECTION
0
COMMAND
\
0
DATA
INFORMATION TRANSFER PHASES
0
STATUS
0
MESSAGE
/
500504-00
4-3

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