Adaptec ACB-5500 User Manual page 41

51/4" winchester disk controller scsi to st506
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There are
few
architectural
restrictions on the sequencing
between I NFORMATION TRANSFER phases al though the ACB-5500 does
have a clearly defined sequence of transfers which it manages.
4.1.5
TIMING
Timing
requirements
are defined
in the ANSI
X3T9.2 SCSI
Specification.
Unless otherwise
indicated,
the
delay
time
measurements
for
each device are calculated from signal
conditions existing at the device port.
Delays in the bus cable
need not be considered for these measurements.
o
ARBITRATION DELAY:
2.2 microseconds
The minimum time that an SCSI device should wait from assert-
ing BSY for arbitration until the data bus can be examined to
see if arbitration has been won.
There is no maximum time.
o
BUS CLEAR DELAY:
800 nanoseconds (maximum)
The maximum time allowed for a device to stop driving all bus
signals after the release of BSY when going to BUS FREE.
o
BUS FREE DELAY:
800 nanoseconds
The minimum time allowed to an SCSI device from detection of
the BUS FREE phase to its assertion of BSY and
its I.D.
during arbi tration.
o
BUS SETTLE DELAY
400 nanoseconds (minimum)
o
DESKEW DELAY:
45 nanoseconds (minimum)
o
RESET HOLD TIME:
25 microseconds (minimum)
The minimum time during which RST is asserted.
No maximum.
o
SELECT TIMEOUT DELAY:
250 milliseconds
The delay allowed for a BSY response from a TARGET before
time out during SELECTION.
4.1.6
ELECTRICAL INTERFACE
All
signals are low true and use open collector drivers
t e r min a ted wit h 22 0 ohm s to
+
5 vol t s ( nom ina 1 ) an d 3 3 0 ohm s to
ground at each end of the cable.
Each signal driven by the controller has the following output
characterists:
True
(Signal Assertion)
=
0.0 to 0.4 VDC @ 48 rnA (maxi)
False (Signal Non-Assertion)
=
2.5 to 5.25 VDC.
Adaptec controllers use a 7438 open collector driver to meet this
500504-00
4-10

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