Diagrams; Block Diagram - Cd Servo Section - Sony HCD-GPX9 Service Manual

Q Q
3 7 6 3 1 5 1 5 0
6-1. BLOCK DIAGRAM – CD SERVO Section –
DETECTOR
CD +3V
A
B
C
D
F
E
OPTICAL PICK-UP
BLOCK
(KSM-213DCP)
LASER DIODE
AUTOMATIC
POWER
CONTROL
Q10
PD LD
T E
L 1 3 9 4 2 2 9 6 5 1 3
16
M101
M
(SPINDLE)
15
17
M102
M
(SLED)
18
2-AXIS
DEVICE
14
13
12
11
w w w
HCD-GPX9
SECTION 6

DIAGRAMS

A
AC_ EQ_
25
RF
SUM IN RFAC
SUMMING 32 33
VCA
B
AMP
26
C
27 FOCUS
FEO
ERROR 23
D AMP
28
F
19
TEO
TRACKING
E
21
18
ERROR AMP
LD PD
APC LD
34 35
AMP
MOTOR/COIL DRIVE
IC251
CH4OUTF
CH4IN OPOUT OPIN+
MOTOR
24 27 2
CH4OUTF
DRIVE
CD DSP
IC101 (2/2)
CH3OUTF CH3FIN
23
MOTOR
CH3OUTR CH3RIN
DRIVE
CONVERTER
21
SFDR
9
TRACKING/SLED
SRDR
10
SERVO DSP
CH1OUTF CH1FIN TFDR
4
11
COIL
CH1OUTR
CH1RIN TRDR
DRIVE
5 12
FFDR
13
FRDR
14
CH2OUTF CH2FIN
5
COIL
CH2OUTR CH2RIN
DRIVE
7
MUTE
20
S101
(LIMIT)
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y
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FILTER
CD DSP
IC101 (1/2)
48 50 47 49 105
RFACI
RFACO
ASYMMETRY
EQ 38 39 DIGITAL PLL
CORRECTOR
ASYI
42
ASYO
43
TO SERVO AUTO
SEQUENCER
DIGITAL
CLV
CPU INTERFACE
PROCESSOR
6 93 95 98 97 100 108
38 34 23 24 19
Q Q
3 7 6
20 22
A/D
SYSTEM CONTROLLER
IC306 (1/3)
FOK
3
FOCUS/ MIRR,
MIRR
DFCT, FOK 1
DFCT
DETECTOR
2
COUT
112 (OUT SW) CDM80 SW1
SERVO
SCLK
INTERFACE
101
(CHUCK SW) CDM80 SW2
SERVO AUTO (TRIGGER SW) CDM80 SW3
SEQUENCER
TO CPU INTERFACE
22
7
u 1 6 3
23 23
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2 4
8 9 9
110
EFM
DEMODULATOR
CONVERTER
32K
D/A
RAM
DIGITAL
INTERFACE
ERROR
CORRECTOR
SELECTOR
SUBCODE
PROCESSOR
91 92 89 90 103 104 106 64 59 62 61
3 1 5 1 5 0 8 9
XTCN 55
CD AMUTE 39
LOADING MOTOR DRIVE
IC701
M701
CDM80 LOAD-IN 60 7 FIN OUT1 4
M
(LOADING)
CDM80 LOAD-OUT 59 9 RIN OUT2 2
S701
63
(OUT)
S702
65
(CHUCK)
S703
61
(TRIGGER)
m
c o
.
HCD-GPX9
2
8 9 9
86
XTSL
XTAO
72
X171
CLOCK
XTAI
16.9344MHz
GENERATOR
73
XTACN
88
CD
AOUT1
(Page 24)
76 A
D/A
AOUT2
81 R-CH
MUTING
Q102
R-CH
CD MUTING
CONTROL
Q317, 318
58 56 57
2 4 9 8 2 9 9
• R-ch is omitted due to same as L-ch.
• SIGNAL PATH
: CD PLAY