Table of Contents
Advertisement
3-3. VIDEO2 BLOCK DIAGRAM
MA-325 BOARD (2/5)
IC201
(1/2)
(SEE PAGE 4-11,4-23,4-25)
Y/C PROCESS
IC201 !∞ PB
R
P
R
C LPF
P
576mVp-p(H)
SEQ
PB RF
15
PB EQ
16
VIDEO 1
(SEE PAGE 3-4)
Q202
REC RF
BUFFER
C ROT
COMP SYNC
IC201 !¢ REC
CNJ901
LINE-1
VIDEO
IN
340mVp-p(H)
CNJ480
CN480
CN423
L2 VIDEO
LINE-2
VIDEO
5
5
IN
IO-64 BOARD (1/2)
(SEE PAGE 4-32)
05
ACC
DET
R
1/2
P
ACC
MAIN
BPF2
P
AMP
CONV
BPF1
KIL
R
SUB
SUB
CONV
BPF
S
FM
DOUB
Q203
S
AGC
LIM
N
17
BUFFER
20
N
14
REC
FM
18
EQ
MOD
IC201 @• REC
66
C ROT
IC201 !• REC/PB
1Vp-p(H)
28
310mVp-p(H)
34
35
30
32
TUNER
TU VIDEO
(SEE PAGE 3-11)
3-5
IC201 $™ REC/PB
IC201 $• REC/PB
REC:440mVp-p(H)
REC:320mVp-p(H)
PB:400mVp-p(H)
PB:270mVp-p(H)
IC202
CCD DELAY
1H
LPF
YNR
42
5
DL
DL EQ
1H/2H
48
3
DL
50
1
R
CLK 10
SUB
DEM
LPF
P
25
Q206
DE
DE
CLP
26
EMH
EMPH
NL
DE-EM
DHP
NC
PIC
C
45
CTL
NC
VIDEO
Y/C
AGC
MIX
P
SYNC
37
SEP
R
33
P
QV/QH
VIDEO
FBC
38
INS
AMP
R
IC201 #¶ REC/PB
IC401 @º REC/PB
4.4Vp-p (H)
1.9 Vp-p (H)
IC401 @•REC/PB
3.6 Vp-p (13.89 MHz)
IC202 7 REC/PB
IC202!£ REC/PB
400mVp-p(H)
REC:360mVp-p (H)
PB:270mVp-p(H)
Q208
7
BUFFER
40
CLP
REC
R
BGA
CTH
Q204
PB
P
BGA-B
13
BUFFER
52
LPF
COMB
Q201
KIL
B.D.
BUFFER
56
X202
3.58MHz
55
NAP
IC201 %∞ REC/PB
BPF
552mVp-p (3.58MHz)
VCLK (IIC)
63
VSDATA (IIC)
64
46
IC401 !§,!• REC/PB
IC401
OSD
S IN
9
2.0Vp-p ( H)
S CLK
10
Q403, 404
Q401
CV IN
CV OUT
BUFFER
18
16
BUFFER
CLP
19
CV CR
Q402
SYNC DET
29
SYNC
SYNC IN
20
V SYNC OUT
7
SEP
CS
8
SW5V
XTAL OUT1
3
X401
14.31818MHz
XTAL IN1
2
15
RESET
VCO
VCO
OUT
IN
28
27
CT401
VCO ADJ
3-6
SLV-ED8/ED9
VCLK (IIC)
VSDATA (IIC)
SYSTEM
CONTROL
(SEE PAGE 3-8)
COMP SYNC
QVD
SI
S CLK
TUNER
MOD V
(SEE PAGE 3-11)
Q901
CNJ901
LINE-1
BUFFER
VIDEO
OUT
CN105
15
H DET
MODE
10
CG V
CONTROL
(SEE PAGE 3-14)
26
OSD CS
IC401 7 REC/PB
IC401 2 REC/PB
5.2 Vp-p (2V)
1.6Vp-p (14.32 MHz)
Advertisement
Table of Contents
