Sanyo MDG-007 Service Manual page 13

IC BLOCK DIAGRAM & DESCRIPTION
—
>in
7
2
3
4
5
6
7
8
9
10
ii
12
13
14
15
16
17
18
19
20
21
22
23
24
25
28
—
27
28
29
=
31
32
33
—
34
—
35
36
37
—
38
39
40
z
42
43
44
Name
P771AN,
P7JAN6
P7JAN6
P7JAN.
P7JAN,
P7JAN,
P7JAN.
P7JAN0
PB=
PBJDA
P5TISR.,JAN ,,
P5JSCLKJAN,.
P5JSOUTJAN ,,
P5JS,NJAN,2
P5JSG21AN ,,
P521scLm/AN ,.
P5,1.SO.TJAN9
P5dS,wlAN.
P6,1S~lC—SIS. M,.
P6W3C,K, ,
P64SW,,
P6.I.%,
P6/cNTR,
P6dcNTRo
P6,1PWfvf
PFL
P4,/T30.T
P4JT1 CUT
P4sllNT,/ZcR
P4JINT4
P4JINT,
P4*/lNT2
P4,
P4dlNTo
RESET
PB,lXc,N
P BdXc,u,
5!..
Xo.,
v=
P2,
P2e
P25
P2.
Function
B-bit C MOS 1/0 port with the same function
aa ports P24 - P27
C MOS compatible input level
C MOS 3-state output
4-bit C MOS 1/0 port with the same function
as ports P24 - P27
C MOS compatible input level
C MOS 3-state output
9-bit C MOS 1/0 port with the same function
as ports P24 - P2,
C MOS compatible input level
C MOS 3-state output
6-bit C MOS 1/0 port with the same function
as ports P24 - P27
C MOS compatible input level
C MOS 3-state output
2-bit input port
C MOS compatible input level
6-bit C MOS 1/0 porl with the same function
as ports P24 - P27
C MOS compatible input level
C MOS 3-state output
2-bit inDUt DOfi
C MOS compatible input level
Reset input pin for active "L"
4-bit C MOS 1/0 port with the same function
as potis P24 - P27
C MOS compatible input level
C MOS 3-st'&e output
Incwt and outrmt Dins for the main clock
generating c~rcuii.
Feedback resistor is built in between XIN
pin and Xout pin.
Connect a ceramic resonator or a quartz-
crystal oscillator between the X,. pin and
X@, pin to set oscillation frequency.
If an external clock is used, connect the
clock source to the X,. pin and leave the
Xw, pin opan.
This clock is used as the oscillating source
Df SVSteIII clock.
Apply voltage of OV to V,.
4-bit 1/0 port
1/0 direction register allows each pin to
individually programmed as either input or
output.
At reset this port is set to input mode.
TTL inrmt level
C MOS 3-state output
Pin I Name I Function
45 P2JDIG1.
46 P2JDIG,. 4-bit output port with the same function as PDrt PC
47 P2,1DIG,7
48 P2JDIG,.
49 Pl,/DIG, s
50 PIJDIG,,
51 PIJDIG,,
52 PIJDIG,, e-bit output port with the same function as port PC
53 PIJDIG,,
54 PldDIG,.
55 P1 ,/SEG.JDIGe
56 PIJSEG.JDIG.
57 PO,lSEG,dDIG,
58 POJSEG,JDIGe 8-bit output port
59 POJSEG,,IDIG.
This port builds in pull-down resistor between
60 PoJSEGdDIG,
pcm PO and the V,, pin
61 POJSEG,JDIG.
At reset this port is set to V,, level
62 POJSEGdDIG,
The high-breakdown-voltage P-channel Open-
63 PO,lSEGmJDIG,
drain
64 POdSEGJDIG.
65 P371SEG,,
66 P3JSEG30
67 P3s/sEG20
68 P3JSEG*. 8-bit output port with the same function as pat PC
69 P3dSEG.,
70 P3JSEG2.
71 P3,1SEGZ=
72 P3dSEG,4
73 P9,1SEGZ,
74 I P9JS EG,,
I
75 P9SISEG2,
76 P9JS EG,o
8-bit output port with the same function as Port PC
~
8-bit l/O DOrt with the same function as ports
84 P84/SEG,,
P2.-P2,
85 P83/SEG,, C MOS compatible input level
86 PadSEG,.
Tha high-breakdown-voltage P-channel Open-
87 Palls EGO drain
88 P8JSEG.
89 PAJSEG,
90 PAJSEGe
91 Vcc
Apply voltage of 4.o to 5.5V to V..
92 PAdSEG.
8-bit l/O port with the sama function as PDrts
93 PAJSEG.
P24-P2,
94 PAJSEG>
C MOS
COMDafible
incmt Iavel
95 PAdSEG,
Tha high-braakdown-voltage P-channel open-
96 PA, ISEG, drain
97 PAdSEG.
98 V,E
Applies voltage suppliad to pull-down resistors of
ports PO, P1, P2.-P2,, P3 and P9
99 AV..
GND input pin for A-D converter and D-A ccmvette
—
Connact AV,, to V-
100 V.E,
Refarance voltaga input pin for A-D convetier and
D-A converter
S*
o
Jul. / '99/ 2500 NS Printed in Japan
SANYO
Technosound Co., Ltd.
L
Osaka, Japan