SOYO SY-6VCA User Manual page 73

Pentium iii, pentium ii & celeron processor supported via 694x agp/pci/amr motherboard 66/100/133 mhz front side bus supported atx form factor
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BIOS Setup Utility
CHIPSET FEATURES SETUP (Continued)
CHIPSET
FEATURES
USB
Keyboard
Support
CPU to PCI
Write Buffer
PCI Dynmic
Bursting
PCI Master 0
WS Write
PCI Delay
Transaction
PCI#2 Access
#1 Retry
Setting
Description
Disabled
Enabled
Select Enabled if your system
contains a Universal Serial Bus
(USB) controller and you have a
USB keyboard.
Disabled
When this field is Enabled, writes
from the CPU to the PCI bus are
Enabled
buffered, to compensate for the
speed differences between the CPU
and the PCI bus. When Disabled,
the writes are not buffered and the
CPU must wait until the write is
complete before starting another
write cycle.
Disabled
When Enabled, every write
transaction goes to the write buffer.
Enabled
Burstable transactions then burst on
the PCI bus and nonburstable
transactions don't.
Disabled
Enabled
When Enabled, writes to the PCI
bus are executed with zero wait
states.
Disabled
The chipset has an embedded 32-bit
posted write buffer to support delay
Enabled
transactions cycles. Select Enabled
to support compliance with PCI
specification version 2.1.
Disabled
When disabled, PCI#2 will not be
disconnected until access finishes
Enabled
(difault). When enabled, PCI#2 will
be disconnected if max retries are
attempted without success.
69
SY-6VCA
Note
Default
Default
Default
Default
Default

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