Akai LT-32Q5LFH Service Manual page 66

32" wide tft lcd tv
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2.1. Register Changes on VCT 49xyI-F1
2.1.1. DRX Part
The major improvement of the VCT 49xyI-F1 DRX-performance is based on the speed up of the Tuner-AGC, the
Video AGC and the Carrier Recovery. While the faster Tuner and Video AGC help to improve significantly the
Streaky Noise and Airplane Flutter issues, the extended Carrier Recovery removes all remaining field test matters.
Although the fast modes are activated by default, some new registers are introduced to enable the configuration of
the modified functions if necessary.
Table 2–4: New DRX Registers
Name
Sub
Advanced Settings
MOD_ACCU_BS[9:0]
h10
MOD_UPDATE
h10
MOD_TH[3:0]
h10
MOD_MODE
h10
MOD_If[3:0]
h10
MOD_Ir[2:0]
h10
NOISE_BS[3:0]
h10
PHAC_BP
h10
FAST_VAGC_EN
h10
COMP_DC_MUX[2:0]
h10
COMP_FREQ_BS[8:0]
h10
Firmware
BP_KI_MIN_BS[5:0]
h10
2.1.1.1. Comments to the Tuner and Video-AGCs
The fast mode of the Video AGC is enabled by default and can be switched off by FAST_VAGC_EN = 0. Neverthe-
less, switching off this new AGC is not recommended.
In earlier versions the VAGC_KI and TAGC_KI values had to be continuously updated to prevent the adaptive KI
control from setting them too low. In the new version a minimum limit register is implemented: BP_KI_MIN_BS
allows to determine the minimum allowed KIs.
For example : BP_KI_MIN_BS = 0x15 means: TAGC_KI must not be lower than 2 and VAGC_KI must not be lower
than 5.
BP_KI_MIN_BS is set to 0x15 by default. Should there be a need for further improving Streaky Noise, 0x16 or 0x17
can be user selected. With the new algorithm VAGC_KI = 6 or 7 are also stable settings and do not produce any
stripes.
CIRCUIT DESCRIPTIONS
Addr
Dir
Reset
h100E[10:1]
RW
0
h100E[0]
W
0
h100F[11:8]
W
5
h100F[7]
W
1
h100F[6:3]
W
6
h100F[2:0]
W
1
h1013[3:0]
W
15
h1015[9]
W
0
h1023[8]
W
1
h10B3[11:9]
W
7
h10B3[8:0]
W
93
h10A5[5:0]
W
21
Range
Function
-512..511
Modulator imbalance value
Write:set
manual
MOD_IR=0, for take-over set MOD_UPDATE=1)
Read:compensated imbalance value
0,1
Update modulator imbalance
1:
write Modulator imbalance value into hardware
0..15
Imbalance control threshold
Selects the edge sensitivity
0,1
Imbalance Control estimation mode
0:
trigger estimation on rising edges
1:
trigger estimation on rising and falling edges
0..15
Imbalance control integral part (falling)
The control uses this value for decreasing imbalance
0..7
Imbalance control integral part (rising)
The control uses this value for increasing imbalance
0..15
Maximum deviation for noise reduction
0,1
Phase correction bypass
0:
active phase correction
1:
bypass phase correction
0,1
Enable Fast VAGC
0:
Fast VAGC disabled
1:
Fast VAGC enabled
0..7
Multiplexer for DC estimation during compensation
The reference signal is attenuated with the following filter
H(z) = 0.5*(1+z^-(4+COMP_DC_MUX)) @fs=40.5MHz
0..511
Increment for reference signal generation
19.7kHz<fref<10.1MHz
COMP_FREQ_BS = (fref*2048/40.5MHz)
0..63
Minimum KI setting
TAGC_KI and VAGC_KI will not be set
below this values
imbalance
value
(with
MOD_IF=0,

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