Akai LT-32Q5LFH Service Manual page 45

LVDS Interface
Pin Name Pin Type
LVA0M Output
LVA0P Output
LVA1M Output
LVA1P Output
LVA2M Output
LVA2P Output
LVA3M Output
LVA3P Output
LVACKM Output
LVACKP Output
LVB0M Output
LVB0P Output
LVB1M Output
LVB1P Output
LVB2M Output
LVB2P Output
LVB3M Output
LVB3P Output
LVBCKM Output
LVBCKP Output
GPO Interface
Pin Name Pin Type
PWM0 Output
PWM1 Output
GPO[1] I/O
GPO[2] I/O
GPO[3] I/O
GPO[4] I/O
GPO[5] I/O
CIRCUIT DESCRIPTIONS
Function
A-Link Negative LVDS Differential Data Output
A-Link Positive LVDS Differential Data Output
A-Link Negative LVDS Differential Data Output
A-Link Positive LVDS Differential Data Output
A-Link Negative LVDS Differential Data Output
A-Link Positive LVDS Differential Data Output
A-Link Negative LVDS Differential Data Output
A-Link Positive LVDS Differential Data Output
A-Link Negative LVDS Differential Data Output
A-Link Positive LVDS Differential Data Output
B-Link Negative LVDS Differential Data Output
B-Link Positive LVDS Differential Data Output
B-Link Negative LVDS Differential Data Output
B-Link Positive LVDS Differential Data Output
B-Link Negative LVDS Differential Data Output
B-Link Positive LVDS Differential Data Output
B-Link Negative LVDS Differential Data Output
B-Link Positive LVDS Differential Data Output
B-Link Negative LVDS Differential Data Output
B-Link Positive LVDS Differential Data Output
Function
GPO with PWM Function; 4mA driving strength
GPO with PWM Function; 4mA driving strength
GPO / FIELD input; 4mA driving strength
GPO / Digital VSYNC Input; 4mA driving strength
GPO / DE Input; 4mA driving strength
GPO / Secondary Video Clock Input; 4mA driving strength
GPO / Digital HSYNC Input; 4mA driving strength
Pin
171
170
169
168
167
166
161
160
165
164
187
186
181
180
179
178
175
174
177
176
Pin
200
201
78
77
76
52
51