Akai LT-32Q5LFH Service Manual page 46

DRAM Interface
Pin Name Pin Type
MVREF Input
MCLKE Output
MCLKZ Output
MCLK Output
RASZ Output
CASZ Output
WEZ Output
DQM[1:0] Output
DQS[3:0] Output
BADR[1:0] Output
MADR[11:0] Output
MDATA[31:0] I/O
Misc. Interface
Pin Name Pin Type
XIN Crystal Oscillator Input
XOUT Crystal Oscillator Output Crystal Oscillator Output
DDCD_DA I/O w/ 5V-tolerant
DDCD_CK Input w/ 5V-Tolerant
BYPASS
VCTRL Output
Power Pins
Pin Name Pin Type
AVDD_DVI 3.3V Power
AVDD_ADC 3.3V Power
AVDD_PLL 3.3V Power
AVDD_PLL2 3.3V Power
AVDD_APLL 1.8V Power
AVDD_MPLL 3.3V Power
CIRCUIT DESCRIPTIONS
Function
Reference Voltage for DDR SDRAM Interface
DRAM Memory Clock Enable
DRAM Memory clock Complementary /Input
(for differential clocks)
DRAM Memory Clock
Row Address Strobe, active low
Column Address Strobe, active low
Write Enable, active low
Data Mask Byte Enable
Data Strobe
Memory Bank Address
Memory Address
Memory Data
Function
Crystal Oscillator Input
HDCP Serial Bus Data / DDC data of DVI port; 4mA driving
strength
HDCP Serial Bus Clock / DDC Clock of DVI Port
For External Bypass Capacitor
Regulator Control
Function
DVI Power
ADC Power
PLL Power
PLL Power
Audio PLL Power
PLL Power
Pin
104
105
106
107
112
115
116
101, 133
81, 100, 134, 153
110, 111
130-127, 124-117
82-85, 88-99,
135-138, 141-152
Pin
203
202
14
15
158
62
Pin
4, 10
17, 34
12
109
49
204