Catalog Chapter1 Specifications and Composition ............4 Chapter2 Function Introduction of Main IC ............ 7 Chapter3 Analysis of Signal process Flowchart and key point measure date ....................31 Chapter4 Maintenance Procedure and Examples of Typical troubleshooting ....................40 Chapter5 Spare Part Lists .....................
Chapter 1: Specifications and Composition 1. Models for LS02/PS02 chassis : Region Europe America Other regions LT26GHxxE LT37GHxxE LT26GHxxU LT37GHxxU LT26GHxxA LT37GHxxA LT32GHxxE LT42GHxxE LT32GHxxU LT42GHxxU LT32GHxxA LT42GHxxA LT47GHxxE LT47GHxxU LT47GHxxA Original xx:01,19,29,30,41 etc. xx:01,19,29,30,41 etc. xx:01,19,29,30,41 etc. Models PT32GHxxE PT42GHxxE PT32GHxxU PT42GHxxU PT32GHxxA T42GHxxA PT50GHxxE...
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RS232 IR_Key E2PROM Flash 8Mx16DDR SVP_AX32 TUNER TV-CVBS,SIF PS301 V1,RGB,FS1,FB1,Vout1 Lin1/Rin1 Lo1/Ro1 Y C,FS2 Lin2/Rin2 Lo2/R02 Y1Pb1PR1/L3R3 S-Video SCART2 SCART1 HDMI Headphone S_Video EU Model S_Video CHN Model...
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4. Introduction of PCB module LCD TV with LS02/PS02 Chassis is made up of power board, side AV board, remote control reception board, key board, and mainboard. The table below is the introduction of the function of all printed board modules. Parts Description Mainboard module is the core of LCD TV signal processing.
Chapter 2: Function Introduction of Main IC 1. Main ICs and functional modules of LS02/PS02 chassis Item no. Model Main function AFT7/W003 AFT7/W103 Tuner,output sound IF and video signal AFT7/W300 SVP AX family video processors provide the highest performance, target converging HDTV-ready and PC-ready LCD TV, PDP TV SVP-AX32LF/SVP-AX68LF...
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+B For PLL & Mixer ADC/NC ADC Input/ No Connected No Connected No Connected IF Output VHF/UHF Signal Input 2. Video processing IC SVP-AX32LF/SVP-AX68LF The SVP CX video processor is a highly integrated system-on-a-chip device, targeting the converging HDTV-ready and PC-ready LCD TV, PDP TV applications where high precision processing of video and data are the requirements.
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● Teletext function ● Supports 16bits DDR memory interface ● Multi-screen display mode ● OSD and VBI/Closed caption and advanced OSD engine Pin function description: Table1: Pin Assignments for CPU-related and GPIO pins...
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Table2 Pin Assignments for Analog Support Interface Table3 Pin Assignments for Analog Input Interface Table4 Pin Assignments for Capture Interface (TV&RGB)
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Table10 Digital Audio Interface Pin Assignments Table11 Pin Assignments for Power and Ground...
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SVP-CX32LF/ SVP-CX68LF internal block diagram: 3.AT24C64-SO8-DNS brief introduction: The AT24C64A provides 65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.
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Main features: • Low-Voltage and Standard-Voltage Operation – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 5.5V) • Low-Power Devices (ISB = 6μA @ 5.5V) Available • Internally Organized 4096 x 8, 8192 x 8 • Two-wire Serial Interface •...
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AT24C64-SO8-DNS internal functional block diagram: 4.W25X80-VSSIG brief introduction W25X80-VSSIG main features: ■ Family of Serial Flash Memories ● 8M-bit/1M-byte(1,048,576) ● 256-bytes per programmable page ● Uniform 4K-byte Sectors/64K-byte Blocks ■ SPI with Single or Dual Outputs ● Clock ,Chip Select, Data I/O, Data Out ●...
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■ Data Transfer up to 150M-bits/second ● Clock operation to 75MHz ● Fast Read Dual Out instruction ● Auto-increment Read capability ■ Flexible Architecture with 4KB sectors ● Sector Erase(4K-bytes) ● Block Erase(64K-byte) ● Page program up to 256 bytes<2ms ■...
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W25X80-VSSIG internal block diagram: 5.HY5DU281622FTP-4 brief introduction: The HY5DU281622FT(P) is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. This Hynix 128Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.
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The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. main features: • VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333) •...
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HY5DU281622FTP-4 internal block diagram: 6. TDA9885T/TDA9886T brief introduction: The TDA9885 is an alignment-free multistandard (PAL and NTSC) vision and sound IF signal PLL demodulator for negative modulation only and FM processing. The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation, including sound AM and FM processing.
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· Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free, frequencies switchable for all negative and positive modulated standards via I2C-bus · Digital acquisition help, VIF frequencies of 33.4, 33.9,38.0, 38.9, 45.75, and 58.75 MHz · 4 MHz reference frequency input: signal from Phase-Locked Loop (PLL) tuning system or operating as crystal oscillator ·...
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7. 74HC4052 brief introduction: The M74HCT4052 is a dual four-channel analog MULTIPLEXER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology and it is pin to pin compatible with the equivalent metal gate CMOS4000B series. It contains 8 bidirectional and digitally controlled analog switches.
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74HCT4052 internal block diagram: 8. 74LVC14A brief introduction: The 74LVC14A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. The 74LVC14A provides six inverting buffers with Schmitt-trigger action.
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14.TDA7266SA brief introduction: The TDA7266SA is a dual bridge amplifier specially designed for TV and Portable Radio applications. Feature: • WIDE SUPPLY VOLTAGE RANGE (3-18V) • MINIMUM EXTERNAL COMPONENTS – NO SWR CAPACITOR – NO BOOTSTRAP – NO BOUCHEROT CELLS –...
Chapter 3: Analysis of Signal process Flowchart and key point measure date This chapter mainly introduces the receipt and dispose of AV signal the power supply system and system control process of this TV. 1. Video signal flow RF signal is demodulated by tuner, then the obtained video signal and signals inputted from COMPONENT terminal, AV, S-VIDEO, 2-way SCART interface and VGA interface are all sent into video-processing IC SVP-AX32LF/SVP-AX68LF for decoding.
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R408(80mA) +12VA 12V shutdown mute circuit PIN1 FB22* power PIN 2 CON11 FB22(320mA) 12V ( voltage of line to 8,7,6,5 screen)CON2 PIN31,32,33 SVP-AX ANALOG PIN 230 FB6(13mA) FB26(112mA) U22 AP1513 FB29(30mA) SVP-AX Power Supply PIN 23,83,100,122, 1.2V 151,169,233,244 FB28(44.5mA) SVP-AX ADC Power Supply PIN 32,40,47,49 FB16(20mA)
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Back light switch control CON20 PIN3,4 FB23* 5V(voltage of line to screen)CON2 PIN 31,32,33,34 PWM back light switch control circuitry FB25 DDR power supply,U7 PIN 1,3,9,15,18,33,55,61 FB24(530mA) change MCU power supply, MCU power supply, FB25 FB33 into2.5V U1 PIN 94, 107, 116, U1 PIN114 (187mA) 128,142,113,114...
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Position Component model Pin 1(V) Pin 2(V) Pin 3(V) number AP1117D25 2.5V AP1117E33 3.3V AZP1122EL 1.2V AP1117E33 3.3V (3) Pin sequence of power cord of power panel Position Pin description number 12VA 12VA CON1 5V-SB 2,3,7,8 CON23 5V-SB 9,10 4. Position and definition of the main components and sockets on mainboard(see next page)
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(1) Socket definition Serial Position Connecting object Function description number number CON1 Power panel +12V,+12V ,GND,GND CON4 Speaker L+,L-,R+,R- CON5 Earphone Board CON8 SCART1 input CON9 SCART2 input CON10 HDMI input CON27 CON13 VGA audio signal input CON12 S terminal input CON14 VGA input CON21...
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AP1122EL 5V to 1.2V DC conversion TDA7266SA Audio amplifier (BTL output) AFT7/W003 AFT7/W103 Tuner output sound IF and video signal AFT7/W300 5. Waveforms at key points (1)RF inputting color bar signal, Composite Video Signal waveform at pin 11 of tuner U8, and the waveform at pin 52 of U1(SVP-AX32LF/SVP-AX68LF)...
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(3) RF inputting color bar signal, clock signal SDA, pin 10 of U9, pin 5 of U3, pin 5 of U12, pin 5 of U16, pin 153 of U1, pin 5 of tuner U15: (4)RF inputting grey signal, Composite Video Signal waveform at pin 11 of tuner U15, and the waveform at pin 52 of U1(SVP-AX32LF/SVP-AX68LF)...
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(7)Inputting sound signal with 1KHz frequency, with the processing of U33 and power amplifier TDA7266DNS, waveform at pin 1, 2, 14, 15 of U33, and waveform at CON4 speaker and CON5 earphone output interfaces:...
Chapter 4: Maintenance Procedure and Examples of Typical troubleshooting 1. Failure phenomenon: The picture is normal, but OSD has line in it. The reason and the processing: Check the pin of U7 and pin 95-150 of U1 for pseudo soldering, and have pseudo soldering touched up. 2.
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Symptoms Possible Reason Solutions No picture, no sound, and no 1.The power cord is not plugged in 1.Plug the power cord in indicator light on 2.The power is off 2.Turn the power on 1.Adjust value Contrast, sharpness, and color 1.Contrast, sharpness, and color 2.Set the Color system to the Picture sound...
Chapter 5: Spare Part Lists This listing of maintenance and repair parts are presented for reference only, modification of parameters will not be informed. For accurate models or specifications, please consult the newest data of our company. Proportion of Number Name Part number Print plate number...
Chapter 6: Factory Setup and notice 1. Enter factory menu Switch on TV set, and make LCD at operating state: ① Press 【MUTE】 key on remote control; ② Press “MENU” key on remote control, and switch to “SOUND” option with 【V+】,【V-】key;...
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Channel Table ChangHong Exit Menu Use 【P+】and 【P-】keys on remote control to make up or down option, and use【V+】 and【V-】keys to set. Contents of sub pages: Panel Control Setting item Setting value Remark LVDS Mapping 0x09 Polarity of LVDS signal SSCDELTA Factory Setting Setting item...
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Tnt Min Bas Min Tnt Mid Bas Mid Tnt Max Bas Max Shp Min Shp Mid Shp Max White Balance Normal Warm R Gain R Gain G Gain G Gain B Gain B Gain R Offset R Offset G Offset G Offset B Offset B Offset...
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B. White balance needs to be set in “Normal”mode; C. Set CLEAR E²PROM will clear the memory data, So do not set it unless it is needed; other setting items do not need setting. 2. Setting method of factory menu ⑴...
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