Sharp LC-42XL2S Service Manual page 152

LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
Ref No.
I2S Interface
T3
T4
T5
U1
U2
U3
U4
U5
V5
V4
V3
V2
SPDIF Interface
T2
UART Interface
Y4
Y3
Y2
Y1
AA1
AA2
AA3
AA4
Smart card Interface
V1
W1
W2
W3
W4
CIR, RTC Interface
M1
N1
L1
L2
L3
L4
L5
M5
M4
M3
M2
K4
K5
R1
Program IO
AF4
Pin Name I/O
SCKIN O I2S: SCK of I2S input port. (Not used)
AC Link: SDATA_OUT
POD2: POD_DRXB, the second POD OOB RX data.
WSI2S I I2S: WS of I2S input port. (Not used)
AC Link: ACLINK_RSTN
POD2: POD_CRXB, the second POD OOB RX gapped clock.
SDI2S I I2S: SD of I2S input port. (Not used)
AC Link: SYNC
POD2: POD_QTXB, the second POD OOB TXQ channel.
WS O I2S: WS of I2S output port.
AC Link: SDATA_IN_2
SCK O I2S: SCK of I2S output port.
AC Link: SDATA_IN_3
SD1 O I2S: SD of I2S output port.
AC Link: BIT_CLK
SD2 O I2S: SD of I2S output port. (Not used)
AC Link: SDATA_IN_0
SD3 O I2S: SD of I2S output port. (Not used)
AC Link: SDATA_IN_1
I2SCLK O I2S: 1, 2, 4, 8 times of SCK of I2S output port, used by D/A chip.
SD4 I I2S: SCK of second I2S input port. (Not used)
POD2: POD_ETXB, the second POD OOB TX enable.
SD5 I I2S: WS of second I2S input port. (Not used)
POD2: POD_ITXB, the second POD OOB TXI channel.
SD6 I I2S: SD of second I2S input port. (Not used)
POD2: POD_CTXB, the second POD OOB TX gapped symbol clock.
SPDIF I/O SPDIF output.
TXD O Data output for UART.
RTS O Request to send output for UART (8mA output pad).
DTR O Data terminal Ready output for UART (8mA output pad, 5V TTL interface 25PF, 6ns
rise timing).
RXD I Data input for UART.
CTS I Clear to send input for UART.
DSR I Data set ready for UART.
DCD I Receive line signal detect for UART. (Not used)
RI I Ring indicator for UART. (Not used)
SCRST I Smart card reset 0, 8mA open-drain output pad. (Not used)
SCPFET I Smart card power FET control output, 8mA open-drain output. The smart card reader
interface requires this pin to drive an external power FET to supply the current for the
Smart Card (65mA typical, 100mA short to ground). (Not used)
SCIO I/O Smart card serial data, 8mA open-drain in out pad. (Not used)
SCCLK O Smart card clock, 8mA open-drain output pad (7.1M to 3.5M) (Not used)
SCPRES I Smart card present detect. (Not used)
VCCH12 — 1.2V RTC power for logic.
VSSH12 — RTC ground for logic.
WDOG O Watch dog reset.
VCCH33 — 3.3V RTC power for logic.
CK32 I 32.768 kHz crystal oscillator input.
CK32E O 32.768 kHz crystal oscillator output.
VSSH33 — RTC ground for logic.
CRX0 I CIR0, receive data for CIRo interface.
PWRON O Main power, power On control signal, low active, 4mA output pad. (Not used)
PWRBT I Power switch button.
VCCHRST I VCCH RST
VCCH12 — 1.2V RTC power for logic.
VSSH12 — RTC ground for logic.
CTX0 O Transmission data for CIR interface.
GP15 I/O Program IO.
PWM: Pulse-Width Modulation.
POD: OVERLOAD, the second POD interface current overload.
Pin Function
5 – 32