Kenwood NX-820H Service Manual page 14

NX-820H(G)/820H
6. Control Circuit
The control circuit consists of the ASIC (IC507) and its pe-
ripheral circuits. IC507 mainly performs the following:
1) Switching between transmission and reception via the
PTT signal input.
2) Reading system, zone, frequency, and program data from
the memory circuit.
3) Sending frequency program data to the PLL.
4) Controlling the squelch on/off using the DC voltage from
the squelch circuit.
5) Controlling the audio mute circuit using the decode data
input.
6-1. ASIC
The ASIC (IC507) is a 32bit RISC processor, equipped
with a peripheral function and ADC/DAC.
This ASIC operates at 18.432MHz clock and 3.3V /1.5V
DC. It controls the fl ash memory, SRAM, DSP, the receive
circuit, the transmitter circuit, the control circuit, and the dis-
play circuit and transfers data to or from an external device.
6-2. Memory Circuit
The memory circuit consists of the ASIC (IC507), the
SRAM (IC503) and the flash memory (IC501). The flash
memory has a capacity of 32Mbit which contains the trans-
ceiver control program for the ASIC and stores the data. It
also stores the data for the transceiver channels and operat-
ing parameters that are written by the FPU. This program
can be easily written from external devices. The SRAM has
a capacity of 1Mbit which contains the work area and data
area.
■ Flash memory
Note : The fl ash memory stores the data that is written by
the FPU (KPG-141D), tuning data (Deviation, Squelch,
etc.) and fi rmware program (User mode, Test mode, Tun-
ing mode, etc.). This data must be rewritten when replac-
ing the fl ash memory.
■ SRAM (static memory)
Note : The SRAM has a temporary data area and work area.
6-3. Display Unit
The display unit is composed of the LCD driver IC (IC1),
the LCD & Key backlight, etc.
T h e L C D i s c o n t r o l l e d u s i n g t h e 4 s e r i a l l i n e s
(LCDDI,LCDCE,LCDCL,LCDDO) from the ASIC (IC507).
6-4. Key Detection Circuit
The keys are detected using an LCD driver IC (IC1). If a
pressed key is detected by IC1, the information is passed to
IC507 through the serial line.
14
CIRCUIT DESCRIPTION
6-5. DSP
es the base band signal. The DSP operates on an external
clock of 18.432MHz (the same as the IC507), the I/O sec-
tion operates at 3.3V and the core section operates at 1.5V.
The DSP carries out the following processes:
7. Power Supply Circuit
converter IC (IC405). IC405 regulates the +B voltage to 5.0V
(50M). 50M operates whenever +B is supplied. IC401 (33M)
and IC408 (15M) are enabled while the 50M is operating.
DSP (IC502), and Flash memory. At this time the ASIC
starts working. The voltage detector IC (IC402) watches the
+B voltage. If the +B voltage is higher than 8.6V, IC402 (/
BINT) outputs High. If the /BINT signal is high, Q403 (SB
SW) is turned on by the SBC signal from the ASIC. (High :
SBC=ON, Low : SBC=OFF). When the SB is turned on, IC1
(80C), IC404 (50C), Q402 (80ANT), Q404 (80T), Q415, 416
(150C), Q417 (50R) and Q408 (50CS) start working. IC409,
Q409 and Q410 are controlled by the SBC signal. If the
SBC signal becomes High, IC409 (33C) operates, and Q409
(33A_2) and Q410 (50MC SW) turn on.
sion to the supply power (80T) for the transmission circuit.
The ASIC sets the signals (RXC) to High during reception to
the supply power (50R) for the reception circuit.
IGN (Ignition sense) signal or /BINT signal, it sets the SBC
signal to Low, and turns the transceiver power (SB) off.
When D401 and Q401 detect an over-voltage condition, they
turn Q403 (SB SW) off, but the ASIC continues to function.
The DSP circuit consists of a DSP (IC502) and process-
• 4 level FSK processing
• Analog FM pre-emphasis/de-emphasis
• Vocoder processing between the audio codec and mod-
ulation/demodulation
• CAI processing, such as error correction encoding
• QT/DQT encoding/decoding
• DTMF encoding/decoding
• MSK encoding/decoding
• 2-tone encoding/decoding
• Compressor/expander processing
• Voice scrambler processing
• Transmit/receive audio fi ltering processing
• Microphone amplifi er AGC processing
• Audio mute processing
• Modulation level processing
+B is connected to the Final amplifi er and the DC/DC
33M and 15M provide the power to the ASIC (IC507),
The ASIC sets the TXC signal to High during transmis-
When the ASIC detects the PSW (Power switch) signal,