Sony XES-Z50 Service Manual page 115

– DSP Board –
IC102, 202 HM51W4260CLTT-7
44 43
42 41 40 39 38 37 36 35
I/O BUS
256K MEMORY
ARRAY MAT
I/O BUFFER
SELECTOR
SELECTOR
I/O BUFFER
256K MEMORY
ARRAY MAT
I/O BUS
2 3 4 5 6 7 8 9 10
1
IC306 MM1284XFFE
BUS ON OUT 1 SW 14
BUS ON INPUT 2 13
SW
GND 3 12
4 11
BUS CLK
VREF 5
BUS DATA 6 10
9
RESET
BUS RESET 7 8
SW
34 33 32 31 30 29 28 27 26
ADDRESS BUS
ROW
DECODER
I/O BUS AND
COLUMN DECODER
PERIPHERAL
CIRCUIT
I/O BUS AND
COLUMN DECODER
ROW
DECODER
ADDRESS BUS
11 12 13 14 15 16 17 18 19
VCC
BUS ON
LINK OFF
CLK OUT
DATA OUT
DATA IN
RESET
IC302 AT24C32N-10SI-TR
START/
25 24 23
STOP
LOGIC
DEVICE
ADDRESS
COMPARATOR
A0 1
A1 2
A2 3
VSS 4
20
21 22
IC401 MBM29F016-90PFTN-DSP02L
IC402 MBM29F016-90PFTN-DSP02H
1 NC
2 NC
A19
3
A18
X
4
A17
DECODER
5
A16
6
A15
7
A14
ADDRESS
8
A13 LATCH
9
Y
A12
DECODER
10
CE
11
STB
12 VCC
13
NC
RESET CONTROL
14
CIRCUIT
A11
15
A10
16
A9
17
A8
18
A7
19
A6
20
A5
21
A4
22
23 NC
24 NC
– 166 –
EN
SERIAL
PUMP/
LOAD
CONTROL
TIMING
COMP
LOGIC
RECOVERY
DATA WORD
X
R/W
EEPROM
ADDRESS/
DECODER
COUNTER
SERIAL
Y
DECODER
D OUT/
LOGIC
D IN
D OUT
16,777,216
CELL
MATRIX
Y GATE
I/O
BUFFER
DATA
LATCH
STB
LOW VCC
DETECTOR CIRCUIT
WRITE/ERASE
PULSE TIMER
WRITE CIRCUIT
ERASE CIRCUIT
CHIP ENABLE/
OUTPUT ENABLE
CIRCUIT
VCC
8
WP
7
SCL
6
H.V.
DATA
MUX
ACK
5
SDA
NC 48
NC 47
A20
46
NC 45
WE
44
OE
43
RY/BY
42
DQ7
41
DQ6
40
DQ5
39
DQ4
38
37
VCC
VSS 36
VSS
35
DQ3
34
DQ2
33
DQ1
32
DQ0
31
A0
30
A1
29
A2
28
A3
27
NC
26
NC
25