SERVICE MANUAL LCD DISPLAY LCD1550X / LCD1550X-BK NEC-MITSUBISHI ELECTRIC VISUAL SYSTEMS CORPORATION DECEMBER 2001 CBB-S5765 Rev.A...
Page 2
Changes Following changes are added to Adjustment Procedure. 1) 1 PC available for DVI-PC is added to 2.2 Measurement instrument used. 2) Configuration of DVI-I input connector (VIDEO) men- tioned in 2.4.3 Configuration of signal input/power input section is revised. 3) The check item <Swivel>...
Page 5
Adjustment procedure ....................... 2-1 2.1 Application ........................... 2-1 2.2 Measurement instruments used ..................2-1 2.3 Standard setting state ......................2-1 2.4 Names of each LCD monitor part, and adjustment methods ........2-2 2.4.1 Configuration of front control panel ............... 2-2 2.4.2 OSM operation method ....................
Page 6
2.8.1.12 Shock test ....................2-13 2.8.1.13 Confirming color selecting (AccuColor) function ........2-13 2.8.2 Picture performance ....................2-14 2.8.2.1 Picture performance inspection ..............2-14 2.8.2.2 Confirming color coordination ..............2-15 2.8.2.3 Panel inspection (luminance / color coordination / defect) ....2-15 2.9 Liquid crystal display defect standards ..............
Circuit description Power circuit (1) The power block is compatible with 100 to 120VAC/220 to 240VAC. (Automatically tracked) (2) The power supply section is a PRC (ON width control with constant OFF time) during P-SAVE, and operates as a pseudo-resonance circuit in the steady state. By feeding back via the photocoupler IC903 from the output voltage with the HIC (STR-G6452) flyback converter type switching IC (IC901) with built-in POWER-MOS FET and separate-exciting control IC, the voltage is constantly controlled to prevent output voltage fluctuations caused by AC...
Detailed description of each circuit 1.2.1 Pseudo-resonance circuit method With pseudo-resonance, when the discharge of energy (secondary coil current = 0) ends on the secondary side of the transformer, the transformer ends the transformer connection. Pseudo-resonance takes place between the primary side inductance and voltage resonance capacitor (or parasitic capacity) between the drain and source.
1.2.2 Switching circuit operation When actually changing over, if the voltage Vth (1) of the pseudo-signal applied on the HIC pin OCP/FB terminal is nearly equal to 0.76VMIN or more or less than the threshold voltage Vth (2) 1.3V, the internal Comp 1 operates, and PRC operation with a fixed OFF interval takes place at TOFF 50µ...
1.2.3 Description of operation (1) When the power is turned ON, C924 is charged by the starting resistors R903 and R934. When this IC901 pin voltage reaches 17.6V, the control circuit starts operation. After the control circuit starts operation, power is attained by rectifying and smoothing the coil voltage at the T901 auxiliary coil (2) IC901 pin OCP/FB terminal, oscillator and constant-voltage control circuit...
Page 11
Conventionally, the charging current of the oscillator's capacitor was changed by the photocoupler current, and the charging time until the threshold voltage Vth (1) $ 0.73[V] was changed. However, with the STR-G6452, the DC bias is controlled. 0.76 ON width control OCP/FB terminal and OCP circuit This is a pulse bypass method overcurrent protection circuit that detects the MOSFET drain current's peak value every pulse, and reverses the oscillator output.
1.2.4 Protection circuit A fuse is inserted in the 12V line (F910, F911) as an overcurrent protection and as a circuit that maintains the oscillator output at the LOW level and stops the power circuit operation when the overvoltage protection (OVP) circuit or overheat protection (TSD) circuit operate. 1.2.4.1.
1.2.4.3 Overvoltage protection circuit This circuit operates the latch circuit when the voltage of pin exceeds 25.5V (typ.). Basi- cally, this functions as the overvoltage protection for pin in the control circuit. Normally, the is supplied from the transformer's secondary coil. This voltage is proportional to the output voltage, and also functions for the secondary output overvoltage when the control circuit is open, etc.
PWB-MAIN basic specifications 1.3.1 Basic specifications · Two analog image system and one digital image system input compatible (AMBI X) · Compatible synchronizing signal Analog 2Ch : SEPARATE, COMPOSITE, SYNC ON GREEN Digital 1Ch : TMDS · Compatible with signals not displayed or selected / Input signal presence judgment and automatic switching function (VIDEO DETECT) ·...
1.3.2 PWB-MAIN circuit block diagram PWB-MAIN block diagram To DVI/D-Sub connector Video clock Panel clock To panel module R-IN1 DVI A_ RED R-IN2 Video 8bit x 2 DVI A_GREEN buffer G-IN1 DVI A_BLUE G-IN2 8bit x 2 B-IN1 B-IN2 D-Sub RED 8bit x 2 Video D-Sub GREEN...
Video input signal specifications •Types of signals Video signal Analog RGB video signal 0.7Vp-p, digital signal TMDS Synchronizing Composite synchronizing signal (TTL level positive/negative polarity) signal Separate synchronizing signal (TTL level positive/negative polarity) Composite image synchronizing signal (0.3Vp-p Sync On Green negative polarity) •...
1.4.2 Horizontal/vertical synchronizing signal input circuit The horizontal/vertical synchronizing signal input from an external source is terminated to 2.2kΩ and then passes through IC201 (74F14) which has hysteresis characteristics. The separate sync and composite sync are input into the synchronizing signal. 33Ω...
1.4.3 Composite sync V separation circuit V signal sampling circuit D3 3V 2SC2412 Composite sync 2.7K -F C/S_V* or S/G_V* To microcomputer 5600P 1.2K -F 74F14 74LCX14MTCX IC201 IC300, IC303 D3 3V HS* or GS* C/S_H* or S/G_H* To microcomputer * indicates the input Ch 1 or 2.
1.4.4 Sync On Green synchronization separating circuit S/G Sep. circuit As comparator decoupling capacity is large. For slicing Input capacity 5.6KΩ 15mA must be small. 470Ω 150Ω Composite sync output 1.48V 2.5V 3.3KΩ 100 Ω 100K Ω 2SK360 220Ω 4.7KΩ 1K Ω...
Page 22
• Study of S/G clamp responsiveness The clamp responsiveness is determined by the response time (80nsec Typ.) of the comparator (IC202, IC203) and the responsiveness of the drive circuit that gives the clamp potential to the video. The responsiveness of the drive circuit is explained below. The transistor turns ON when the comparator output is Lo.
1.4.5 TMDS receiver The TMDS signal (4Ch differential signal) shown below is input for the digital input signal. The TMDS receiver (IC500: Sil143) decodes this TMDS signal, and generates an 8-bit x 3 (RGB) data signal, VCLK, DE, HSYNC and VSYNC. Maurice2 is compatible with the digital input, so the TMDS receiver output can be directly connected.
1.4.6 Input signal presence judgment function List of control signals µ-COM Pin No. I / O Remarks Function Signal name I / O ASIC control ASIC 47 ~ 51 MS*,RSTN DVI-I(A) C / S_H1 H measurement at H, V Sep. and C / S V measurement at C / S DVI-I(A) C / S_V1...
Page 26
• Digital input signal presence judgment For digital signals, the input signals are judged as the following table according to the state of the SCDT signal (64-pin) input into the microcomputer (IC102) from the TMDS receiver (IC500). Results of input signal judgment (Microcomputer input port) of digital signal SCDT...
1.4.7 Input signal switching control function List of control signals µ-COM Pin No. I / O Signal name Function Remarks 47 ~ 51 I / O MS*, RSTN ASIC control ASIC SEL_HS1_SG1 H, V Sep, and C/S and S/G input switching 74ACT157SJ SEL_HS2_SG2 H, V Sep, and C/S and S/G input switching...
Page 28
Since the buffer power is decreased when disabled, energy can be conserved by disabling both analog Ch video buffer outputs during the PMS mode, when the front power is OFF and during digital Ch display. Front power switch Display input Ch SEL_1 SEL_2 DVI-I (D)
Page 29
• Digital signal DVI-I (D) and analog signal (DVI-I (A), D-SUB) switching The microcomputer sets the ASIC internal input switching switcher (SOURCE register) to "external digital" for DVI-I (D), "analog 1" for DVI-I (A), and to "analog 2" for D-SUB. •...
1.5.1 DDC switching control function List of control signals µ-COM Pin No. Signal name Function Remarks UP/DOWN CONTROL OUTPUT X9116WM-2.7 /INC INCREMENT CONTROL OUTPUT X9116WM-2.7 CHIP SELECT OUTPUT X9116WM-2.7 A2_DIG EEPROM for DIGITAL A2-ADDRESS SENSE NJM319V A2_ANA EEPROM for ANALOG A2-ADDRESS SENSE NJM319V Function When the A5V_OR_DVI power (refer to next page) or DVI SELECT in OSM function is...
Page 32
The DDC switching circuit can operate when either the A5V (monitor synchronizing signal/DDC system power) or DVI connector pin 14 +5VDC (external power from PC) is turned ON (A5V_OR_DVI power). The tap position information (equivalent to DVI SELECT results) stored in the X9116WM-2.7's non-volatile memory is automatically loaded when the power is turned ON.
Page 33
SEE USER'S MANUAL FOR MORE INFORMATION Key operations: : Selects an item (downward). (Moves upward when at last line) : Selects an item (upward). (Moves downward when at top line) : Invalid : Invalid NEXT : Invalid RESET : Invalid EXIT : Exits the OSM menu The DVI SELECT menu for the OSM function is shown above.
1.5.2 DDC2BI/DDC CI function (only DVI-I connector side) List of control signals µ-COM Pin No. Signal name Function Remarks DDC_SDA DVI-I connector DDC communication data DDC_SCL DDC communication clock DVI-I connector Function With the DDC2BI or DDC CI function, data in the initialization EEPROM can be communicated with multiple functions such as external direct read &...
1.5.3 EDID data write protect control function List of control signals µ-COM Pin No. Signal name Function Remarks EDID data write protect setting: Lo/Cancel: Hi M24C02WMN6T P_ID0 LCD panel module setting Pull-up / Pull-down P_ID1 P_ID2 P_ID3 Function An EDID data write protection function is provided to prevent the monitor's EDID data from being damaged by an external source.
1.6.1 DC/DC converter and panel power specifications DC/DC specifications Electrical characteristic Standards Item Unit Min. Typ. Max. Input voltage Vin voltage 11.0 12.0 13.0 Input current Vin current 1200 5V system voltage 5.00 5.25 5.50 Output voltage 3.3V system voltage 3.20 3.40 3.60...
Page 39
MB3778PFV-G-BND-EF(IC608) Study of DC/DC step down circuit design IC607 L610 Output voltage V (Ch1) 5.25V Input voltage V 330Ω C604 C641 5.6kΩ IC608 1.8kΩ MB3778PFV IC609 L603 1.23V Output voltage V (Ch2) 3.40V 270Ω C652 5.6kΩ 15KΩ 330pF 3.3kΩ 1.23V •...
Page 40
• Output smoothing capacitor C641, C652 : 25V_470M-M ESR = 0.15Ω MAX / 20˚C, 100kHz Tolerable ripple current = 670mArms / 105˚C, 100kHz * Tolerable ripple current frequency compensation coefficient = 1 5V output system Ripple voltage (specifications) = 50mVp-p Ripple voltage = ∆I <...
Page 41
PQ1CZ21H2ZP(IC611) Study of DC/DC step down circuit design L618 Output voltage V (Ch1) 5.70V Input voltage V 750Ω C656 C657 IC611 5.6kΩ PQ1CZ21H2ZP 1.8kΩ • Output voltage V (specification) = 5.70V (Typ.) (design value) • (1+ R1/R2) = 1.26V±2% = 1.26V • 1+(5.6kΩ+750Ω)/1.8kΩ) = 5.71V •...
Page 42
MB3778PFV-G-BND-EF (IC608) Study of DC/DC power MOS FET drive circuit Power MOS FET : Vishay Siliconix product P-Channel MOS FET : Si3457DV (CP260P470A11) (IC607, IC609) [Rating] = -30V, I (DC)= -3.4A (Ta=70˚C), I (PULSE)= -10A, P = 1.3W (Ta=70˚C) [Specifications] on resistor R = 0.1Ω...
1.6.3 Power rising/falling edge sequence control function List of control signals µ-COM Pin No. Signal name Function Remarks P_SAVE PRC mode of power borad : Lo / resonance mode : Hi switching PWB-POWER PRO_DLY Inverter protection circuit Invalid : Lo/Valid : Hi PWB-POWER 47 ~ 51 MS*, RSTN...
Page 44
• Power management control (FET-SW and regulator ON/OFF control, etc.) (1) At AC power ON System reset Microcomputer initialization P_ON = ON P_SUS* = ON ASIC initialization ASIC power save mode transfer (2) Front power switch = ON & power save recovery P_SAVE = ON (resonance mode) ASIC power save mode cancel P_PANEL = ON(black mask)
Panel interface • Timing for panel power and interface signal PANEL5V Interface signal (3.3V system) The following is set to satisfy the following panel AC timing with the microcomputer timing control. < 40ms < 0ms < t2 50ms < = 0ms <...
Page 47
1.7.1 Switch board interface List of control signals µ-COM Pin No. Signal name Function Remarks LEFT OSM menu selection : Normally 1, Lo when switch is pressed PWB-SW EXIT OSM menu selection : Normally 1, Lo when switch is pressed OSM menu selection : Normally 1, Lo when switch is pressed RIGHT OSM menu selection : Normally 1, Lo when switch is pressed...
1.8.3. Input/output terminal functions (1) J703 PIN No. Name Function Power input Power input Inverter power control input P_INVT Power ON (HIGH), OFF (LOW) Protection circuit control input PRO_DLY Protection circuit valid (HIGH), invalid (LOW) Dimming PWM signal input DUTYCINV Resonance circuit active (HIGH), inactive (LOW) Sequence at inverter ON P_INVT...
1.8.4. Detailed description of each circuit 1.8.4.1 Power input section F701 Oscillation circuit 1 Source Drain J703 R702 F702 1/16W 4.7K-J Oscillation circuit 2 Gate R701 1/16W 4.7K-J IC703 HAT1021R Q705 P_INV R718 DTC143EKA-T 1/16W 220-J The 12VDC output from the power board (PWB-POWER) is turned ON and OFF with the FET switch (IC703), and is supplied to each oscillation circuit.
1.8.4.3 Protection circuit section The protection circuit is configured of a lamp current detection protection circuit (lamp current limiter) that detects errors by detecting the current in the lamp return wire, and setting a threshold for the upper and lower limits of that value. In addition, this circuit has an overvolt- age protection circuit that detects the power voltage value, and a fuse.
1.8.4.3.3 Protection circuit operation timer circuit (malfunction prevention) If detection of an error continues for a set time, the protection circuit will function to prevent malfunctions. R604 R718 Main substrate IC102 (microcomputer) P_INVT J703 PRO_DLY R606 3.3V 10% IC701 comparator Q717 Q718 R720...
Page 54
Appendix Table 2. Microcomputer port assignment table Pin No. Port No. Pin name Pin assignment Details Default value Place of use P0_0 DVI-I connector DDC switching control signal 0: Dec (digital), 1: Inc (analog) X9116WM P0_1 DVI-I connector DDC switching control signal Tap slide at each falling edge X9116WM P0_2...
2. Adjustment procedure 2.1 Application This adjustment procedure applies to the 15-inch (LCD1550X) LCD display monitor. 2.2 Measurement instruments used (1) Analog signal generator: Astro Design VG-813 or equivalent (2) Digital signal generator: Astro Design VG-828D or equivalent (3) DVI-D PC:...
2.4 Names of each LCD monitor part, and adjustment methods 2.4.1 Configuration of front control panel EXIT CONTROL ADJUST RESET/ OSD NEXT / INPUT POWER-SW POWER-ON INDICATOR (LE (Note) When the item listed below is selected and RESET button is pressed, then the data value is to be set as follows.
2.4.3 Configuration of signal input / power input section D-SUB 1 pin input connector (VIDEO) Input signal cable is detachable. Signal Definition Red Video 5 5 5 5 1 1 1 1 Green Video 6 6 6 6 Blue Video DDC GND Red GND D-SUB Host Receptacle Connector...
2.5 PWB, mechanism and appearance inspection 2.5.1 Visual and conductivity check (1) There should be no cracks, remarkable contamination or solder faults on the PWBs. (2) There should be no remarkable lifting or inclination of the parts on the PWBs, and the parts should not be in contact with other parts.
Page 60
(9) Check the movement of stand without SIGNAL-CABLE (DVI-D / DVI-A) and AC-POWER-CORD. <Inclination> Display (top) unit should move properly without abnormal sound such as clattering or squeaking when it is moved as Picture A below. Display (top) unit should not move when (+) button on the front is pressed lightly with the index finger. <Pivot>...
To initialize the preset timing, write the default data of preset timing listed in 2.11 Timing chart with an external source by communication. Model name Confirm that the model name shown on the OSM picture in factory mode is LCD1550X. 2.6 General adjustment and inspection 2.6.1 Preparation Note1) Rough adjustment should be implemented with 100VAC/60Hz, and aging (heat-running) should be implemented with 240VAC/50Hz.
2.6.1.3 Aging (1) Set to aging mode with OSM. (2) Carry out heat running for 30 minutes or more in the no-signal state. (3) Cancel aging mode with OSM. <How to enter aging mode> To enter aging mode, press (+) and (-) buttons simultaneously holding down RESET button when OSM is displayed in NO SIGNAL state.
The configuration of DDC (EDID) data is as follows. EDID DATA DUMP TEXT Standard Timing #1: -- ANALOG EDID DATA DUMP TEXT -- NOT USED Manufacturer Code: NEC Product Code (HEX): 65C8 Standard Timing #2: Product Code (DEC): 26056 NOT USED...
Page 64
ANALOG EDID DATA DUMP HEX 00 FF FF FF FF FF FF 00 Monitor Name (block #3): NEC LCD1550X 38 A3 C8 65 SN SN SN SN WW YY 01 03 0E 1E 17 78 Monitor Serial Number (block #4): S2...
Page 65
1024x768 @ 60 Hz GTF Data: 00 0a 20 20 20 20 20 20 1024x768 @ 70 Hz 1024x768 @ 75 Hz Monitor Name (block #3): NEC LCD1550X Standard Timing #1: Monitor Serial Number (block #4): S2 NOT USED Standard Timing #2:...
Page 66
DIGITAL EDID DATA DUMP HEX 00 FF FF FF FF FF FF 00 38 A3 C8 65 SN SN SN SN WW YY 01 03 80 1E 17 78 EE C6 A4 9E 57 4A 99 26 19 4F 57 BF EE 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88...
2.8 Inspection Unless particularly designated, the performance is confirmed in 2.3 Standard setting state. The display should be set to the full white pattern with signal generator. 2.8.1 Electric performance 2.8.1.1 Confirming the operation of operation SW (1) The picture must appear within four seconds after turning power switch ON. (2) Confirm that Power-On Indicator is lit.
2.8.1.9 Confirming power management function (1) Input the specified timing with signal generator, and set the pattern to full white. Mode Power voltage Input timing Power consumption 60KHz75Hz i XGA75 j Normal AC240V 50Hz 38W or less Power-Save 3W or less “...
2.8.2 Picture performance 2.8.2.1 Picture performance inspection Check the picture performance with the following procedure. Confirm that preset symbol (P ¢ ¢ ) is correctly displayed on the upper right of the OSM picture in correspondence to the preset timing designated in the factory mode.
2.8.2.2 Confirming color coordination (1) Input timing No. 14 (60kHz/75Hz, XGA75) with signal generator, and set the pattern to full white. (2) Set BRIGHTNESS to MAX (220) and CONTRAST to CENTER (128) with OSM, and confirm that the color coordination at the center of the liquid crystal panel is as follows with COLOR COMPENSATION is off (NATIVE).
(2) Liquid crystal picture defect Input the confirmation timing with signal generator. Visually check for the defects in each full mono color pattern of white, black, red, green and blue. Carry out the measurement where there is little effect from outer light (in a dark room, etc.).
2.9.3 Standards for display conditions (standard for errors/defects) In case the state of the picture displayed is not fully stable (when the power switch is turned ON/OFF, the back light is operating to turn on and so on), the following standards should not be applied. Item Standard Allow ance...
Page 73
Note 2: 3 dots Note 3: 3-defect combination Combination patterns to be counted as NG / Combination of all bright or all black dots and so on. Not counted as NG / Combination of bright and black dots and so on. Note 4: The dots for composing 2-horizontal combinations of R + G shall be excluded from counting.
Page 74
Note 7: A set of 2 or more dot defects in an area of 5x5 pixels If there are 2 or more dot defects ( ) in an area of 5 5 pixels, such a set of dot defects shall be counted as one cluster. 5 5 pixels Dot defect ( ) There should be less than 2 clusters throughout the screen area.
45SEC OSM LOCK OUT j RESOLUTION NOTIFIER MODEL NAME at FACTORY MODE LCD1550X 2.10.2 Checking the labels, etc. “Rating nameplate” and “Serial No.” must be attached at the designated positions. 2.10.3 Packaging specifications (1) There must be no remarkable contamination or scratching, etc.
2.11 Timing chart <Preset Timing List> Horizontal Vertical Frequency Period Sync. Front Back Display Frequency Period Sync. Front Back Display Timing HS/VS Preset pulse porch porch time pulse porch porch time m o. clock name Polarity (KHz) (Hz) (ms) ( ˚ S) (MHz) (ms) (ms)
2.12 OSM display matrix <User mode> Adjustment Default Level OSM item Setting or circuit operation range value BRIGHTNESS Darkens Brightens Modulates inverter (back light) 0-MAX CONTRAST Small Large Changes output data with digital contrast 0-MAX CENTER CONTRAST (AUTO) Executes Automatically adjusts contrast ¥...
Page 78
LANGUAGE Enters into sub menu Selects language used at OSM pictures: 7 languages ENGLISH ¥ OSM POSITION Moves to the left Moves to the right Changes OSM display position horizontally 0-MAX CENTER (LEFT/RIGHT) OSM POSITION Moves down Moves up Changes OSM display position vertically 0-MAX CENTER (DOWN/UP)
Page 79
<Factory mode> Adjustment Default Level OSM item Setting or circuit operation range value BRIGHT_MIN. BRIGHTNESS Darkens Brightens Modulates inverter (back light) BRIGHT_MAX BRIGHT_MAX. CONTRAST Small Large Changes output data with digital contrast 30-225 CONTRAST (AUTO) Executes Automatically adjusts contrast ¥ ¥...
Page 80
LANGUAGE Enters into sub menu Selects language used at OSM pictures: 7 languages ¥ ENGLISH OSM POSITION Moves to the left Moves to the right Changes OSM display position horizontally 0-100 (LEFT/RIGHT) OSM POSITION Moves down Moves up Changes OSM display position vertically 0-100 (DOWN/UP) OSM TURN OFF...
Page 81
CHANGE SETUP ¥ EEP WRITE EEPROM write protect for EDID Effective: ON ¥ PROTECT Ineffective: OFF Initialize with AC Power OFF of monitor (ON) POWER SAVE Power save mode Effective: ON Ineffective: OFF ¥ (Note 1) Setting values are different by timing. (Note 2) It is available with analog input.
3. TROUBLE SHOOTING Contents Page No Power No Picture Abnormal Picture or Ineffective Adjustment...
Page 83
This trouble shooting is premised that the monitor has any problem. 1. No Power (POWER-ON INDICATOR is off) Is drive pulse Is approx. 18V output from input into #4 Power primary circuit may have any problem. Please check the parts below. #1 of IC901? (VCC) of Power...
Page 84
MPU may have any problem. Please check the part below. IC102 2. No Picture 2.1 Back Light Does Not Turn On (POWER-ON INDICATOR (Green) Is Blinking) Is control pulse for Is DC2.5V (D2.5V) D2.5V line may have any problem. Please check the parts brightness of below.
Page 85
2.2 Back Light Is On (POWER-ON INDICATOR (Green) is blinking). Is DC5V input Does OSD 5V line may have any problem. Please check the parts below. into #4 of appear? MAIN (Power) DC 12V/5V convertor- Tr Q601 IC610? MAIN (Power) DC 12V/5V convertor- IC IC607 MAIN (Power)
Page 86
2.3 POWER-SAVE Operates (POWER-ON INDICATOR (Orange) is blinking.) Is DC5V (A5V) Is sync. signal (or SCDT) input into output from #6 A5V line may have any problem. Please check the parts below. each pin of MPU of IC601? IC601 MAIN (Power) A5V generator- IC IC102? IC106...
Page 111
SERIAL NUMBER INFORMATION SERIAL NUMBER INFORMATION SERIAL NUMBER INFORMATION Refer to the serial number information shown below. Ex.) Rating label Model name: LCD1550X Serial No. Manufactured ******** 1 1 1 1 1 2 1 2 0 0 0 0 0 0 0 0 1...
Technical Specification 15”TFT COLOR LCD MONITOR Model Name : MultiSync LCD1550X (LCD1550X / LCD1550X-BK) DATE : Oct. 4, 2001 Drawn by Checked by NEC MITSUBISHI ELECTRIC VISUAL SYSTEMS CORPORATION NAGASAKI WORKS - 1 - Document No. VSPF-A028...
Page 113
Document History This document contains electrical and mechanical specification of LCD1550X. Notice: /Please use this specifications after you confirm it is latest specifications. /If you find the difference between common specification and this specification, this specification is given priority. Design and Specifications are subject to change without notice Rev.
Page 114
TABLE of CONTENTS 1 Foreword ..................................4 2 General Description (Quick Reference) ........................5 3. Electrical Characteristics............................6 3.1 Input signals ................................. 6 3.2 Signal level ................................6 3.3 Power Supply ............................... 6 3.4 Power management ............................. 6 Functions..................................7 4.1 Front control SW ..............................
*The LCD1550X color monitor has a 15.0" diagonally measured LCD. *The LCD1550X color monitor has a 15 pin mini D-sub connector that is configured for IBM VGA compatible adapter. And also LCD1550X color monitor has a DVI-I connector for Digital video and Analog video signal adapter.
3. Electrical Characteristics 3.1 Input signals Video signal Analog RGB / Digital TMDS Composite Sync(Negative/ Positive) Sync signal Separate Sync (Negative/ Positive) Sync-on green 3.2 Signal level spec Signal name Unit Remarks Typ. Horizontal frequency 30.0 Vertical frequency 75.1 Hz Video clock frequency 25.1 78.8 MHz...
4. Functions 4.1 Front control SW 1 @ 2 NEXT RESET ADJUST CONTROL EXIT INPUT 4.2 OSD function 4.2.1 OSM Control The various functions are controlled by 7 buttons on the front bezel using OSM(On Screen Manager). 4.2.2 OSM USER Menu Group Menu Adjustment Item Description...
4.3 Control Lock Mode This control completely locks out access to all OSM control functions. When attempting to activate OSM controls while in the Lock Out mode, a screen will appear indicating the OSM controls are locked out. To activate the OSM Lock Out function, press both of “select Left” and “select Right ” and hold down simultaneously. In this mode only “OSD Rotation”...
4.4.2.2 Input Signal Connectors Table 4. DVI Connector Pin Assignment Signal Name Signal Name T.M.D.S. Data 2- Hot Plug Detect T.M.D.S. Data 2+ T.M.D.S. Data 0- T.M.D.S. Data 2 Shield T.M.D.S. Data 0+ N.C. T.M.D.S. Data 0 Shield- N.C. N.C. DDC Clock N.C.
5. Screen Performance 5.1 Test condition AC voltage 120/240 VAC 60/50Hz Video signal 1024X768 @60Hz 0.7Vp-p Aging times more than 30min Temperature 20 to 25 degrees, C. Relative humidity 40 ` 80 Brightness : 100% Contrast and Display Image must be set by Auto-setup with test- Setting pattern on the screen ( Black-Level: 50% ).
6. Mechanical Specifications 6.1 Cabinet Tilt Base Cabinet F PC+ABS ( Flame class : 5VB ) White Tilt base FPC+ABS ( Flame class : 5VB ) Molded material Cabinet F PC+ABS ( Flame class : 5VB ) Black Tilt base FPC+ABS ( Flame class : 5VB ) White Mist White i Mitsubishi color NO.
7. Environment condition 7.1 temperature, Relative Humidity & Altitude Operating Storage and shipment Temperature 5 to 35 degrees, C. - 20 to 60 degrees, C. 10 to 80 % 10 to 90% Related humidity without condensation without condensation Altitude 3,000m(10000ft) 16,000m(53333ft) 7.2 Vibration test(Packing) Swept Sine...
8. TFT LCD Panel Specifications 8.1 TFT LCD Panel Specifications Item Specifications Remarks LCD Module type 15.0” / 38.016 cm diagonal Unit : 331.6(H) x 255.5 (V) mm x 13.5 (D) Module Dimension Display Type Active matrix thin-film-transistor (TFT) Display Mode IPS, Normally Black Resolution 1024 iH j ~ 768(V)
Page 126
Notes (note 1) Contrast ratio is defined as the following formula. Brightness(Luminance) with all pixels at "white" Contrast ratio = Brightness with all pixels at "black" (note 2) Viewing angle is measured as follows: =90 ( 2 o’clock) Eye point = 80 (9 o’clock) =0 (3 o’clock) TFT LCD Module...
Page 127
Bave =Average brightness of (1) to (9) - 16 - Document No. VSPF-A028...
8.2 Defect, Scratch and Dust Conditions These defects are inspected under the following conditions: Temperature: 77+0/-9 degree. F, 25+0/-5 degree. C. Viewing angle: Standard viewing angle (refer to below figure) θ 45degree for inspection with non-lighting screen =< θ 5 degree for inspection with lighting screen =<...
8.2.1 . Inspection criteria Defect Type Acceptable Unit Note A area Adjacent Luminous 2 Adjacent Dot Notes1.2 Fault R+G Horizontal Adjacent, Dark 2 Adjacent Dot G+R Horizontal Adjacent Total ( Adjacent 3 or more Notes3 Luminous Dot Adjacent 3 or more Dark Dot Dots Fault R.G.B(Dark dots + Notes 4...
Page 130
Notes 9 1. Dot defect Defective part exceeds 30% of area at one dot. 2.Dot defective with luminous mode: Luminous dot which bright more than 30% Cwhen display the screen with all black pattern. 3. Dot defective with dark mode: Luminous dot which bright more than 70% C when display the screen with all white pattern.
Page 131
Note 1: Examples of “Adjacent 2 dots” are as follows Dot defect combination @ @ : Bright dot :Dark dot Count Criteria @ @ @ @ Note1. R+G horizontal adjacent Note1. Combination of bright and dark dots Allowed Combination of different color Allowed etc.
Page 132
Note 6: Example of “Distance between each sets of E ” is as follows. : Bright dot Count Criteria @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ 10mm @ etc.
9 Notice for Handling A LCD (Liquid Crystal Display) has the following specific characteristics. These characteristics are not indicative of a defect or malfunction. (a) The display condition of an LCD may be affected by the ambient temperature. (b) The LCD uses cold cathode tubes for backlight. Optical characteristics such as brightness or uniformity will change during the LCD's life time (c) Uneven brightness and/or small spots may appear depending on different display patterns.
Appendix I Preset Signal Timings H-Video H active Horizontal H front H back H pulse H total V-Video V active Vertical V front V back V pulse V total - 23 - Document No. VSPF-A028...
Appendix II EDID Code – ANALOG EDID DATA DUMP TEXT Manufacturer Code: NEC Product Code (HEX): 65C8 Established Timings: Product Code (DEC): 26056 720x400 @ 70 Hz (Microsoft INF ID: NEC65C8) 640x480 @ 60 Hz Serial Number (HEX): SN 640x480 @ 67 Hz...
Page 136
Horizontal Border: 0 pixels GTF Data: 00 0a 20 20 20 20 20 20 Vertical Border: 0 lines Horizontal Image Size: 304 mm Monitor Name (block #3): NEC LCD1550X Vertical Image Size: 228 mm Interlaced: NO Monitor Serial Number (block #4): S2 EDID EDITOR V1.44 (010306) Copyright (C)
Page 137
LCD1550X – DIGITAL EDID DATA DUMP TEXT Manufacturer Code: NEC Established Timings: Product Code (HEX): 65C8 720x400 @ 70 Hz Product Code (DEC): 26056 640x480 @ 60 Hz (Microsoft INF ID: NEC65C8) 640x480 @ 67 Hz Serial Number (HEX): SN...
Page 138
Horizontal Border: 0 pixels GTF Data: 00 0a 20 20 20 20 20 20 Vertical Border: 0 lines Horizontal Image Size: 304 mm Monitor Name (block #3): NEC LCD1550X Vertical Image Size: 228 mm Monitor Serial Number (block #4): S2 SN: Serial number...
LCD1550X Appendix III Preset Timing Chart Horizontal Vertical Timing Freq. Period Pulse Front Back Display Freq. Period Pulse Front Back Display Clock Width Porch Porch Time Width Porch Porch Time HS,VS (MHz) (KHz) ( ˚S) (Hz) (ms) ( ˚S) ( ˚S) ( ˚S)
LCD1550X Appendix IV Regulation Regulation Regulation Country Country Version Version Comments Comments Regulation Regulation Country Country Version Version Comments Comments A A A A B B B B C C C C (U.S.A.) (U.S.A.) (U.S.A.) (U.S.A.) (EU) (EU) (China) (China)
Page 180
ALL PARTS LIST MODEL NO.: LCD1550X SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION ***CAPACITOR*** C 100 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 101 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 102 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 103 CP156P060 02...
Page 181
SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION C 247 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 248 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 249 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 250 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 254 CP156P052 05 C-CERAMIC-CHIP CH50V 47P-J 1.6X0.8...
Page 182
SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION C 501 CP156P056 01 C-CERAMIC-CHIP CH25V 1000P-J 1.6X0.8 C 502 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 503 CP156P055 02 C-CERAMIC-CHIP CH50V 470P-J 1.6X0.8 C 504 CP156P072 05 C-CERAMIC-CHIP F_6.3V_106-Z C 505 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 506...
Page 183
C-M-PP 100V 0.056M-J LXA595W C 702 CP173P280 01 C-M-PP 100V 0.056M-J LXA595W C 703 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 704 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 705 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 706 CP156P240 02 C-CERAMIC SL6.3KV 15P-J...
Page 184
D1NL20U D 904 CP264P342 01 DIODE D1NL20U D 906 CP264P293 03 DIODE MTZ J 6.8 B D 908 CP264P593 01 DIODE SF15JC10 LCD1550X D 910 CP264P566 01 DIODE SARS01 LXA595W D 911 CP264P566 01 DIODE SARS01 LXA595W ***FUSE*** F 600...
Page 195
ALL PARTS LIST MODEL NO.: LCD1550X-BK SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION ***CAPACITOR*** C 100 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 101 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 102 CP156P060 02 C-CERAMIC-CHIP B50V 103-K 1.6X0.8 C 103 CP156P060 02...
Page 196
SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION C 247 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 248 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 249 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 250 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 254 CP156P052 05 C-CERAMIC-CHIP CH50V 47P-J 1.6X0.8...
Page 197
SUMBOL NO. PART NO. DESCRIPTION/SPECIFICATION C 501 CP156P056 01 C-CERAMIC-CHIP CH25V 1000P-J 1.6X0.8 C 502 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8 C 503 CP156P055 02 C-CERAMIC-CHIP CH50V 470P-J 1.6X0.8 C 504 CP141P518 01 C-CERAMIC-CHIP B6.3V_106-K 2.0X1.25 C 505 CP156P060 03 C-CERAMIC-CHIP B16V 104-K 1.6X0.8...
Page 198
C-M-PP 100V 0.056M-J LXA595W C 702 CP173P280 01 C-M-PP 100V 0.056M-J LXA595W C 703 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 704 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 705 CP156P240 02 C-CERAMIC SL6.3KV 15P-J LCD1550X C 706 CP156P240 02 C-CERAMIC SL6.3KV 15P-J...
Page 199
D1NL20U D 904 CP264P342 01 DIODE D1NL20U D 906 CP264P293 03 DIODE MTZ J 6.8 B D 908 CP264P593 01 DIODE SF15JC10 LCD1550X D 910 CP264P566 01 DIODE SARS01 LXA595W D 911 CP264P566 01 DIODE SARS01 LXA595W ***FUSE*** F 600...