Tmds Receiver - NEC LCD1550X Service Manual

1.4.5

TMDS receiver

The TMDS signal (4Ch differential signal) shown below is input for the digital input signal.
The TMDS receiver (IC500: Sil143) decodes this TMDS signal, and generates an 8-bit x 3
(RGB) data signal, VCLK, DE, HSYNC and VSYNC. Maurice2 is compatible with the digital
input, so the TMDS receiver output can be directly connected.
Differential signal RX0±
(BLUE)
Differential signal RX1±
(GREEN)
Differential signal RX2±
(RED)
Differential signal RXC±
T
bit
T
CJ
T
DJ
T
skew(inter)
T
pixel
*DVI Ver. 1.0 Standards
< =
• Clock jitter T 0.3 x T
CJ
• Data jitter T , inter-pair
DJ
< =
• Inter-pair T
skew skew(inter)
T
CJ
Trigger point
Tolerable jitter / skew range
640 x 480@60Hz
640 x 400@70Hz
Typ Max
3.972ns
1.19ns
1.59ns
23.8ns
39.72ns
bit
<
T 0.4 x T
=
skew skew(intra) bit
0.6 x T
pixel
T
DJ
T
pixel
800 ~600@60Hz
Typ Max
2.500ns
0.75ns
1.00ns
15.00ns
25.00ns
(The data jitter T is specified with the template)
DJ
1 - 17
T
bit
1024 ~768@60Hz
Typ Max
1.538ns
0.46ns
0.62ns
9.23ns
15.38ns