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Schematic Diagrams
+VCORE
E
Q10
2N3906
C
Sheet 33 of 44
+VCORE
[4,5]
[4,5]
VCORE+ VCORE- Place trace 12 mils.
[14]
CPU_VLD
B - 34 +VCORE
+2.6VS
R581
R582
R583
Reserve For K8-M
+3V
*10K_04
*10K_04
*10K_04
D48
C
A
*SCS751V
R32
R31
D49
C
A
*SCS751V
10K_04
10K_04
D50
C
A
*SCS751V
Z3437
Z3438
R590
R589
R592
E
B
B
Q9
D51
C
A
*SCS751V
10K_04
10K_04
10K_04
C
2N3906
Z3439
D47
C
A
*SCS751V
R30
R29
+12V
174K
100K
D4
SGND5
1SS355
[4,17]
H_VID4
[4,17]
H_VID3
[4,17]
H_VID2
[4,17]
H_VID1
+3V
[4,17]
H_VID0
R51
J2
+VIN
1
28
Z3410
VID4
VCC
OPEN
*10K_04_1%
2
27
Z3411
VID3
PWM1
R74
3
26
Z3412
VID2
PWM2
510K
4
25
VID1
PWM3
5
24
VID0
PWM4
C107
680P
T212
VCORE+
Z3401
6
23
Z3413
Crowbar
CS1
C106
R66
C95
27P
Z3402
8
22
Z3414
FB
CS2
2K_1%
680P
Z3404
Z3405
9
21
Z3415
COMP
CS3
R54
8.45K
7
20
Z3416
VCORE-
FBRTN
CS4
10
19
PWRGD
GND
Z3406
11
18
Z3417
EN
CSCOMP
+3V
Z3407
12
17
Z3418
DELAY
CSSUM
Z3408
13
16
RT
CSREF
R52
C105
R65
R64
Z3409
14
15
RAMPADJ
ILIMIT
0.0047U_08
10K_04
0.039u
390K
487K
U6
ADP3186
C110
R81
220K
100p_04
+3V
SGND5
SGND5
R49
10K_04
+3V
Z3420
C156
R43
R99
Q13
D
2N7002
10K_04
0.01u_04
10
C96
R50
S
G
Z3429
100K_04
SGND5
*1u
Q11
R44
D
2N7002
100K_04
S
G
CPUVDD_EN [14]
SGND5
Q12
D
2N7002
S
G
TEST [31,32,34]
R91
0_08
SGND5
VCORE
C905
C899
C900
C901
C902
C903
C904
0.1u_04
0.1u_04
0.1u_04
0.1u_04
0.1u_04
0.1u_04
0.1u_04
R579
R580
1129
*10K_04
*10K_04
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
R591
R588
10K_04
10K_04
+VDD5
D10
A
C183
C181
4.7u_08
0.1u
C165
C173
C153
U9
1
10
IN
BST
*4.7u_08
10u/25V_12
0.1u_08
ADP3419
2
9
SD#
DRVH
3
8
DRVLSD#
SW
4
7
CROWBAR
GND
5
6
VCC
DRVL
R93
0
Z3421
R92
0
Z3422
T213
R101
T214
R102
124K
R100
43K
R98
95.3K
124K
C164
C152
100p_04
D9
A
C182
C180
4.7u_08
0.1u
U8
1
IN
BST
ADP3419
2
SD#
DRVH
3
DRVLSD#
SW
4
CROWBAR
GND
5
VCC
DRVL
C
1SS355
Z3423
C613
C235
C236
C234
6 7
8
6 7
8
+
Q72
5
Q71
5
D,
D,
*RQA180N03
RQA180N03
0.1u_08
10u/25V_12
10u/25V_12
. D.
D
. D.
D
R108
22U_25V_OS10*5
4
4
G
G
C187
,
S
..
,
S
..
0
1u_04
1
2
3
1
2
3
Z3424
Z3425
R112
0
Z3427
L33
1.0uH
Z3426
R111
0
C608
C605
6 7
8
Q69
Q70
5
6 7
8
+
+
+
D,
RQA200N03
5
RQA200N03
D,
. D.
D
D35
. D.
D
4
G
4
G
,
S
..
,
S
..
SCD34
1
2
3
1
2
3
Z3428
+VIN
Q75
6 7
8
Q74
6 7
8
C599
C218
C217
5
5
C219
+
D,
D,
C
1SS355
Z3430
*RQA180N03
RQA180N03
. D.
D
. D.
D
4
4
G
G
,
S
..
,
S
..
R107
C186
1
2
3
1
2
3
0
1u_04
10
Z3431
R110
0
9
Z3432
Z3434
8
L34
1.0uH
7
6
Z3433
R109
0
Q77
6 7
8
Q76
6 7
8
C592
C585
5
5
+
+
D,
D,
RQA200N03
RQA200N03
D38
. D.
D
. D.
D
4
4
SCD34
G
G
,
S
..
,
S
..
1
2
3
1
2
3
Z3435
RTH1
100K/NTC
Z3436
Close to
output
Inductor
+2.6VS [4,9,12,13,14,31]
+12V [34]
+3V [4,15,17,18,19,20,21,22,26,28,31,32]
+3VS [2,6,8,11,12,13,14,15,16,17,19,20,21,23,24,26,27,29,30,31]
+5VS [8,15,19,20,21,23,25,26,27,28,30,31]
VCORE [5]
+VDD5 [2,8,26,31,32,34,35]
+VIN [25,26,31,32,34,35]
+5V [17,20,21,23,26,31]
PM_DPRSLPVR into High,
When CPU Entry C3,C4.
+VIN
C601
VCORE
30A
C577
+
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