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Appendix B: POST Codes
Code
Description
(hex)
10
Test DMA Controller 1
11
Test DMA Page Registers
12-13 Reserved
14
Test Timer Counter 2
15
Test 8259-1 Mask Bits
16
Test 8259-2 Mask Bits
17
Test Stuck 8259's Interrupt Bits
18
Test 8259 Interrupt Functionality
19
Test Stuck NMI Bits (Parity/IO
Check)
1A
Display CPU clock
1B-1E Reserved
1F
Set EISA Mode
20
Enable Slot 0
21-2F Enable Slots
1-15
30
Size Base and
31
Test Base and
32
Test EISA
33-3B Reserved
3C
Setup Enabled
3D
Initialize & Install Mouse
3E
Setup Cache Controller
3F
Reserved
BF
Chipset Initialization
40
Display virus protect disable or
enable
68
Micronics C400 System Board Manual
Test DMA Page Registers.
Test 8254 Timer 0 Counter 2.
Verify 8259 Channel 1 masked ts interrupts by
alternately turning off and on the interrupt lines.
Verify 8259 Channel 2 masked interrupts by alternately
turning off and on the interrupt lines.
Turn off interrupts then verify interrupt mask register is
on.
Force an interrupt and verify the interrupt occurred.
Verify NMI can be cleared.
If EISA non-volatile memory checksum is good,
execute EISA initialization. If not, execute ISA tests an
clear EISA mode flag.Test EISA Configuration Memory
Integrity (checksum & communication interface).
Initialize slot 0 (System Board).
Initialize slots 1 through 15.
Size base memory from 256K to 640K Extended
Memory and extended memory above 1MB.
Test base memory from 256K to 640K Extended
Memory and extended memory above 1MB using
various patterns. NOTE: This test is skipped in EISA
mode and can be skipped with ESC key in ISA mode.x
If EISA Mode flag is set then test Extended Memory
EISA memory found in slots initialization.x NOTE:
This test is skipped in ISA mode and can be skipped
with ESC keyin EISA mode.
Detect if mouse is present, initialize mouse, install
interrupt vectors.
Initialize cache controller.
Program chipset registers with Setup values
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