Frequency Generation Circuitry; Synthesizer; Vco - Motorola GP350 Service Manual

GP350 Portable Radios Service Manual

Frequency Generation Circuitry

to minimize the error produced at the emitter of Q156 result-
ing from the voltage offset at the input of U151A.
The voltage at the other input of the summing amplifier,
U151B, is supplied from two DACs contained within U152.
These DACs are controlled by the microprocessor, and pro-
vide the reference voltage for the control loop. One of the
DACs, that connected to Pin 9 of U152, provides a coarse
tune voltage, while the other provides a fine tune voltage.
Since the output of the DACs is not zero when they are set to
their lowest level, resistor R169 is provided to bias up the
minus input of the summing amplifier to compensate for the
bias resulting from the DACs.
The error voltage at the input of U151B produces a voltage
at its output, which is in turn applied to the series pass tran-
sistor, Q152, through its driver, Q151. The voltage at the col-
lector of Q152 is applied to the controlled stage of the power
module, which for both VHF and UHF is the module's sec-
ond stage. The feedback from the collector of Q152 to the
emitter of Q151 through R166 is provided to keep the two
stages stable. Likewise, the feedback from the collector of
Q152 to the minus input of the summing amplifier is to keep
the whole control loop stable.
The purpose of Q155 and its associated circuitry is to keep
the control voltage on the module below 7.0 volts, which is
the maximum allowed for the UHF module.
The purpose of R173 was originally that of providing com-
pensation to the control loop for changes in the supply volt-
age, TX B+. However, experimentation has shown that this
compensation is not really required. Also, thermistor, R170,
was provided to enable the shut back of the PA in the event
that it would get too hot. This has also been shown to not be
required
Frequency Generation Circuitry
The frequency generation circuitry is composed of two main
IC's, the Fractional-N synthesizer (U201) and the VCO/
Buffer IC (U251). Designed in conjunction to maximize
compatibility, the two IC's provide many of the functions
which normally would require additional circuitry. The
block diagram illustrates the interconnect and support cir-
cuitry used in the design. Refer to the schematic for refer-
ence designator.
The supply for the synthesizer is from Regulated 5 volts
which also serves the rest of the radio. The synthesizer in
turn generates a superfiltered 5 volts (*actually 4.65 volts)
which powers U251.
In addition to the VCO, the synthesizer must interface with
the logic and AFIC circuitry. Programming for the synthe-
sizer is accomplished through the data, clock, and chip
enable lines (pins 5, 6, and 7) from the microprocessor ,
U401. A serial stream of 98 bits is sent whenever the synthe-
sizer is programmed. A 5 volt dc signal from pin 2 indicates
to the microprocessor that the synthesizer is locked while
unlock is indicated by a low voltage on this pin. Transmit
modulation from the AFIC is applied to pin 8 of U201. Inter-
August, 1996
nally the audio is digitized by the Fractional-N and applied
to the loop divider to provide the low-port modulation. The
audio is also run through an internal attenuator for modula-
tion balancing purposes before being outputted at pin 28 to
the VCO. A 2.1 MHz clock for the AFIC is generated by the
Fractional-N and is routed to pin 11 where it is filtered and
attenuated from 2.5 volts to approximately 2 volts.

Synthesizer

The Fractional-N synthesizer uses a 16.8 MHz crystal
(Y201) to provide the reference frequency for the system.
The other reference oscillator components external to the IC
are C205, C206, R207, and CR203. The 16.8 MHz signal is
divided down signal from the VCO. The loop filter, com-
prised of R201, R202, R205, C201, C214, C215, and C216,
provides the necessary dc steering voltage for the VCO as
well as filtering of spurious signals from the phase detector.
For achieving fast locking of the synthesizer, an internal
adapt charge pump provides higher current capability at pin
31 than when in the normal steady-state mode. Both the nor-
mal and adapt charge pumps receive their supply from the
voltage multiplier which is made up of C202, C203, C204,
C231, CR201, and CR202. By combining two 5 volt square
waves which are 180 out-of-phase along with Regulated 5
volts, a supply of approximately 12.6 volts is available at pin
32 for the charge pumps. The current for the normal mode
charge pumps is set by R203. The pre-scaler for the loop is
internal to U201 with the value determined by the frequency
band of operation.

VCO

The VCO (U251) in conjunction with the Fractional-N syn-
thesizer (U201) generates rf in both the receive and the trans-
mit modes of operation. The TRB line (U251 pin 5)
determines which oscillator and buffer will be enabled. A
sample of the rf signal from the enabled oscillator is routed
from U251 pin 23, through a low pass filter, to the pre-scaler
input (U201 pin 20). After frequency comparison in the syn-
thesizer, a resultant CONTROL VOLTAGE is received at the
VCO. This voltage is a DC voltage between 3 and 10 volts
when the PLL is locked on frequency.
In the receive mode, U251 pin 5 is grounded. This activates
the receive VCO by enabling the receive oscillator and the
receive buffer of U251. The rf signal at U251 pin 2 is run
through a low pass filter. The rf signal after the low pass filter
is the LO RF INJECTION and it is applied to the first mixer
at T2.
During the transmit condition, PTT depressed, five volts is
applied to U251 pin 5. This activates the transmit VCO by
enabling the transmit oscillator and the transmit buffer of
U251. The rf signal at U251 pin 4 is run through a low pass
filter and an attenuator to give the correct drive level to the
input of the PA module (U101 pin 1). This rf signal is the TX
RF INJECTION. Also in transmit mode, the audio signal to
be frequency modulated onto the carrier is received by the
transmit VCO modulation circuitry at AUDIO IN.
6880904Z07-O
Theory of Operation
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