Frequency Generation Circuitry; Figure 2-26:Frequency Generation Unit Block Diagram - Motorola Professional Radio Service Manual

The output of inverter U350 is also used to control the receiver front end AGC.
The receiver front end automatic gain control circuit provides and additional 20 dB of gain reduction.
The output of the receiver back end inverter U350 is fed into the receiver front end AGC inverter
U302. The components R317, R314, and C318 determine:
• the RF level at which the front end AGC is activated, and
• the slope of the voltage at the output of U302 vs. the strength of the incoming RF at the antenna.
As the RF into the antenna increases the following occurs:
• The output voltage of the receiver back end inverter U350 decreases.
• The voltage at the output of the front end inverter U302 increases.
• The result is the forward biasing of pin diode CR301.
As the diode becomes more and more forward biased the following occurs:
• C310 loads the output of the low noise amplifier Q302 thus reducing the gain of the low noise
amplifier.
• R315 and R318 provide a DC path for CR301 and also limit the current through CR301.
The blocking capacitor C317 prevents DC from the AGC stage from appearing at the input of the filter
FL301.

2.23 Frequency Generation Circuitry

Voltage
Multiplier
VCP
Vmult1
Synthesizer
Vmult2
U201
16.8 MHz
Ref. Osc.
Modulating
Signal
The Frequency Generation Circuitry is comprised of two main ICs, the Fractional-N synthesizer
(U201), and the VCO/Buffer IC (U250). Designed in conjunction to maximize compatibility, the two ICs
provide many of the functions that normally would require additional circuitry. The synthesizer block
diagram illustrates the interconnect and support circuitry used in the region. Refer to the relevant
schematics for the reference designators.
The synthesizer is powered by regulated 5V and 3.3V which come from U247 and U248 respectively.
The synthesizer in turn generates a superfiltered 4.5V which powers U250.
In addition to the VCO, the synthesizer must interface with the logic and ASFIC circuitry.
Programming for the synthesizer is accomplished through the data, clock and chip select lines from
Dual
Transistor
Aux3
Aux4
Loop
Filter
MOD Out
Figure 2-26: Frequency Generation Unit Block Diagram
TRB
Rx VCO
VCOBIC
Circuit
U250
Tx VCO
Circuit
Rx
Out
Injection
To Mixer
Amplifier
Tx
Out Buffer
To PA Driver
Amplifier
2-39