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Table 7.13. Memory expansion connector. PET pin numbers.
Line labels and line descriptions (continued).
Side A
line
Line Description
Pin Numbers
Labels
A9
BAS
Address bit 8, used for memory expansion.
Buffered.
A10
BA9
Address bit 9, used for memory expansion.
Buffered.
All
BA 113
Address bit 10, used for memory expansion.
Buffered.
A12
I
BAll
Address bit 11, used for memory expansion.
I
Buffered.
A13
I
NC
No connection.
A14
I
NC
I
No connection.
A 15
NC
,
No connection.
I
I
SEL 1
,
4K byte page address select for memory
AlB
I
locations 100IJ·1FFF.
A17
SEL 2
4K byte page address select for memory
I
locations 2IJIJIJ-2FFF.
A1S
SEL 3
4K byte page address select for memory
I
locations 30IJIJ-3FFF.
I
A19
SEL4
,
4K byte page address select for memory
,
I
locations 4GIJ0-4F FF.
A20
I
SEL 5
4K byte page address select for memory
,
locations 5GIJ0-5FFF.
A21
SEL 6
4K byte page address select for memory
locations 6IJIJ0-6FFF.
A22
SEL 7
4K byte page address select for memory
locations 7000·7FFF.
A23
I
SEL 9
4K byte page address select for memory
locations 90IJ0·9FFF.
A24
I
SEL A
4K byte page address select for memory
I
locations A000·AFFF.
A25
SEL B
4K byte page address select for memory
I
locations BIJ00-BFFF.
A2B
I
NC
No connection.
,
A27
i
RES
Reset for 6502 microprocessor. Note:
I
connected to 74LSOO output.
A2S
I
JR(j
Interrupt request line to the microprocessor.
A29
I
B02
I
Buffered phase 2 clock.
A30
RIW
Buffered read/write from 6502 micro-
processor.
A31
NC
No connection.
A32
NC
No connection.
A33
BD0
Data bit 0. Buffered.
A34
I
BDl
I
Data bit 1. Buffered.
A35
BD2
I
Data bit 2. Buffered.
A3B
BD3
Data bit 3. Buffered.
A3l
BD4
Data bit 4. Buffered.
A3S
BD5
Data bit 5. Buffered.
A39
BOB
Data bit 6. Buffered.
A40
BDl
Data bit 7. Buffered.
64
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