Epson PC AX Technical Manual page 181

REV .A DIAGRAMS AND REFERENCE MATERIALS
TABLE ]-2-2. GAATAB PIN DESCRIPTION
SYMBOL 1/0* PIN NO.
A16-1 I 63-60,38-35,
31-27,5-3
LSAO I 8
SA16-0 Tri 53-50,47-44
21-18, 15-11
XA16-0 Tri 59,58,56-54,
43-41,39,26,
24-22,10,9,
7,6
ALE I 2
OEN
I
25
DXA I 57
C590 I 33
G590N I 34
R590N I 40
TESTN I 1
NAME AND FUNCTION
CPU address bus.
Converted address O. It is identical to CPU
address 0 (AO), except when word to byte
conversion is being performed.
System address bus.
Internal address bus.
Address latch enable. A16-1 are latched by ALE.
Enable control of latched address (A16-1). When
low, LSAO and latched A16-1 are enabled.
Direction control of internal address bus(XA16-
0) buffer. When high XA16-0 are driven by SA16-
0, and when low SA16-0 are driven by XA16-0.
Clock of refresh counter. Refresh counter
increments at C590 rising edge.
Outpu t enable of refresh counter. When low,
refresh address is placed on SA7-0.
Reset on refresh counter. When low, refresh
counter is cleared.
Test input. Should be pulled up.
*
Legend: I
o
Tri
Input Pin
Output P in
Tri-state Pin (Input, Output, High Impedance)
7-7