Appendix B: Memory And Register Map - Technologic Systems TS-7400 Hardware & Software Installation

APPENDIX B: MEMORY AND REGISTER MAP

Address Region
0xF000_0000 - 0xFFFF_FFFF
0xD000_0000 - 0xDFFF_FFFF
0xC000_0000 - 0xCFFF_FFFF
0x8084_0000 - 0x8084_00C8
0x8000_0000 - 0x800F_FFFF
0x7000_0000 - 0x7FFF_FFFF
0x6000_0000 - 0x6FFF_FFFF
0x3000_0000 - 0x3FFF_FFFF
0x2000_0000 - 0x2FFF_FFFF
0x1000_0000 - 0x1FFF_FFFF
0x0001_0000 - 0x0000_FFFF
Register Address
0x8090_0020
0x8090_0018
0x8090_0008
0x808D_0000 - 0x808D_FFFF UART2 control registers
0x808C_0000 - 0x808C_FFFF UART1 control registers
0x808A_0000 - 0x808A_FFFF SPI control registers
0x8084_0044
0x8084_0040
0x8084_0034
0x8084_0030
0x8084_0020
0x8084_0018
0x8084_0008
0x8081_0000 - 0x8081_FFFF
0x8080_0000 - 0x8FFF_FFFF
0x800B_0000 - 0x800B_FFFF VIC 0 registers
0x8006_0000 - 0x8006_FFFF
0x8002_0000 - 0x8002_FFFF
0x8001_0000 - 0x8001_FFFF
0x60c0_0002
0x60c0_0000
0x62c0_0002
0x6040_0003
0x6040_0002
0x6040_0001
0x6040_0000
© May, 2010
TS-7400/TS-9441 MANUAL
APPENDIX B: MEMORY AND REGISTER MAP
nCS0 (not used)
SDRAM (not used)
SDRAM (not used)
GPIO control registers
AHB mapped registers
CS7 (bit bus cycles)
CS6 (Flash)
CS3 (not used)
CS2 (16-bit bus cycles)
CS1 (8-bit bus cycles)
SDRAM region
Function
Cirrus A/D lock register
Cirrus A/D channel select register
Cirrus A/D result register (RO)
LCD_EN, LCD_RS, LCD_WR direction reg.(bits3-5)
LCD_EN, LCD_RS, LCD_WR data reg.(bits3-5)
DIO_8 direction register (bit 1)
DIO_8 data register (bit 1)
On-board LEDs register (bits 0, 1)
Port C direction register
Port C data register
Timer Control registers
APB mapped registers
SDRAM control registers
USB registers
Ethernet MAC registers
GPBUS data register with address auto-increment
(read/write of this register initiates GPBUS bus cycle
with automatic increment of 8-bit address register at
0x12c0_0002)
GPBUS data register (read/write of this register
initiates GPBUS bus cycle)
GPBUS address register (write only)
ECC bits 21-16, read/write of this register resets ECC
bits
bit 5:0 - ECC bits 21-16
bit 7:6 - reserved
* ECC is fed by read or write data to the flash data
register at 0x6000_0000
ECC bits 15-8
ECC bits 7-0
NAND flash control register
bit 0 - ALE signal
bit 1 - CLE signal
bit 2 - CS signal
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Function
43