Common Interfaces General Information; Serial Ports; Digital I/O; A/D Converters - Technologic Systems TS-7400 Hardware & Software Installation

5 COMMON INTERFACES GENERAL INFORMATION

The purpose of this section is to provide general information about the common
interfaces, such as Serial Ports and Digital Input/Output, which appear in more than one
header or connector of the TS-7400. For further information on these features, refer to the
Connectors and Headers section of this manual.

5.1 Serial Ports

The TS-7400 has 3 TTL-level serial ports.
Connector, and null modem cable to connect to a console program on a PC.

5.2 Digital I/O

There are 20 individually configurable GPIO pins available on the TS-7400. Each of these
pins can be configured as a floating input (high impedance, no internal pull-up/pull-down)
or as an output driving a 0 or 1 logic signal. When configured as an input, the voltage
thresholds are nominally at standard 3.3V LVCMOS levels, but with 400 mV of hysteresis
(Schmitt triggers) for better noise immunity with slow slew signals. As an output, GPIO
pins can drive 8mA while still presenting valid LVCMOS thresholds as measured at the
output pin. More current can be sourced/sunk from output pins (2-3x more is typically
safe) but the resulting output voltage will no longer be within LVCMOS thresholds-- e.g.
attempting to source 30 mA out of a pin set to logic '1' will result in voltage of 1.0V instead
of the nominal 3.3V.
The 20 GPIO pins are NOT 5V tolerant. This means if you drive any GPIO pin configured
as input to above 3.3V, you may cause permanent damage to the device.
A common workaround for 5V tolerance is to use external Schottky diode clamps with
series current limiting resistors. A better workaround is to use LVC245 or equivalent
buffer chips. With diode clamps or external buffers guaranting 5V tolerance on input pins,
one can safely interface to 5V TTL logic devices since in every other way 3.3V LVCMOS
is compatible with 5V TTL logic. Note that 5V CMOS is NOT compatible with 3.3V
LVCMOS as the logic '1' threshold for 5V CMOS is 3.5V. Since this is 0.2V above the
3.3V the TS-7400 is capable of, reliable operation cannot be guaranteed although the
interfacing may actually seem to work some of the time.
Some GPIO pins have dual functionality. This includes the pins used for the GPBUS and
the serial UART. GPBUS is a simple 8-bit multiplexed address/data bus and is described
below. The serial UART on pins DIO_15, DIO_16, and DIO_17 are available for GPIO
manipulation when the UART baud rate is set to '0' (disabled). If the UART is configured
for operation with a non-zero baud rate, the GPIO pins are taken over by the UART core.
Using the GPIO pins in Linux involves getting access to the GPIO data direction register
and data register (listed above). In general userspace applications, this involves opening
the "/dev/mem" driver and using the mmap() system call to acquire a memory window
where direct pointer manipulation of the hardware registers can occur. One may also write
a kernel driver and interface to user applications through a defined API. Because it is
difficult to anticipate the needs for a kernel driver API and the performance implications
involved in even the simplest of userspace to kernelspace API's, Technologic Systems
does not provide such a driver. Moving GPIO logic to the kernel may still be preferable if
the bulk of GPIO client code is in the kernel or if there are strict real-time requirements to
be met.

5.3 A/D Converters

The EP9302 A/D converter is standard on all TS-7000 series boards. The Cirrus EP9302
features a 5 channel, 12-bit Analog to Digital Converter with an analog multiplexer, having
an input range of 0 to 3.3 V. The Cirrus A/D converter can do a maximum of 925 samples
per second, and requires a settling time of 2 milliseconds between channel switches.
© May, 2010
TS-7400/TS-9441 MANUAL
COMMON INTERFACES GENERAL INFORMATION
Use the TS-9441 peripheral,
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