Memory; On-Board Sdram; On-Board Nand Flash - Technologic Systems TS-7400 Hardware & Software Installation

Table of Contents

Advertisement

Internal interrupts may be programmed as active high or active low level sensitive inputs.
GPIO pins programmed as interrupts may be programmed as active high level sensitive,
active low level sensitive, rising edge triggered, falling edge triggered, or combined
rising/falling edge triggered.
The EP9302 interrupt controller also includes the following features:
Supports 54 interrupts from a variety of sources (such as UARTs, GPIO and ADC)
Routes interrupt sources to either the ARM920T's IRQ or FIQ (Fast IRQ) inputs
Three dedicated off-chip interrupt lines operate as active high level sensitive interrupts
Any of the 19 GPIO lines maybe configured to generate interrupts
Software supported priority mask for all FIQs and IRQs
Note
For peripheral driver development purpose, notice that the external IRQ lines 5,6
and 7, which are ISA/X86 architecture based, are mapped to EP9302 external
interrupt lines 22, 33 and 40, respectively. For further information about interrupts,
including the EP9302 interrupt controller and map, refer to the
Guide, chapter 5.

4.2 Memory

TS-7400 uses three types of memory. The SDRAM is the fast access volatile memory
used to run applications by the processor and the on-board flash is the non-volatile
memory used for storage purpose. Flash memory may also be added using USB memory
drivers.

On-Board SDRAM

The TS-7400 uses 32 MB SDRAM technology to provide 32, 64, or 128 MB of high-speed
volatile memory. The memory is soldered directly to the board, making the TS-7400 more
reliable in high-vibration environments.
The TS-7400's RAM is not contiguous in the physical memory map of the EP9302. But
the MMU is programmed to remap the blocks of RAM to appear as a contiguous block of
memory at the very beginning of the virtual memory map. In the case of a 256 Megabit
SDRAM chip (32 MB), it is located at 0 through 32 MB in the virtual memory map.
Refer to the MMU section of this manual to understand how the physical memory is
mapped and the virtual memory is translated.
Note
It is possible to use larger sizes of the SDRAM chip than the standard 32 MB one.
The TS-7400 is designed to accommodate both 32 MB and 64 MB chips, providing
up to 128 MB of RAM memory. Contact Technologic Systems for larger SDRAM
sizes.

On-Board NAND Flash

The TS-7400 uses a NAND Flash chip for its on-board Flash resource. The physical
address of the Flash chip is 0x6000_0000. The on-board flash is broken up into partitions
and accessed through the Linux driver framework known as "MTD", or Memory
Technology Device. The partitioning is dynamic and depends on the DOS-style MBR
found at sector 0 of the flash. This MBR can be changed by using the "fdisk" command on
the /dev/mtdblock/0 device, but doing so is not recommended.
/dev/mtdblock/0 - Whole disk block device driver
/dev/mtdblock/1 - First MBR partition (bootloader kernel binary)
© May, 2010
TS-7400/TS-9441 MANUAL
www.embeddedARM.com
HARDWARE COMPONENTS
EP9301 User's
26

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ts-9441

Table of Contents