Technologic Systems TS-7400 Hardware & Software Installation page 33

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For fast back-to-back accesses to consecutive addresses, you should use the the data
register at 0x60c0_0002.
without having to interleave updates to the address register. Although there is only an 8-
bit address register, it is trivial to use other free GPIO lines as high address lines should
you need more than 256 bytes of address space for the GPBUS.
Should you require it, a 14.7456Mhz clock can be output from the TS-7400 on DIO_13.
To enable this, set bit 3 of the 8-bit register at address 0x12000000 and set the data
direction for DIO_13 as output. External IRQ is also available on DIO_11 by similarly
setting bit 1. One can also enable DMA with the EP9302 CPU M2M DMA controller by
allowing DRQ on DIO_12 (bit 2).
If you choose to use DMA or IRQ support for the GPBUS, you will likely want to write a
kernel driver. Simple userspace applications can not directly set up interrupt handler
functions or translate the virtual addresses of process data structures to the physical
addresses needed by the DMA controller. When writing a kernel driver in C, one should
be aware of certain details:
To set a handler on the GPBUS IRQ, you must request IRQ #33 and
sharing (the UART and SD drivers also generate the same IRQ). This means calling
the request_irq() kernel function with SA_SHIRQ in the 'flags' parameter.
To use DMA, you must manipulate the M2M1 EP9302 DMA channel. Details on its
programming can be found in the EP9302 CPU User Manual from Cirrus Logic at
http://www.cirrus.com
To access various registers in arbitrary physical address space, use the __ioremap()
function and not the ioremap() kernel function. ioremap() does not expect physical
addresses and will apply an offset to your requested address on the EP9302 ARM
Linux kernel.
If you are unable to write a driver yourself, you may consider contracting Technologic
Systems to write one for you.
requirements for less cost than it takes to accomplish internally.
© May, 2010
TS-7400/TS-9441 MANUAL
COMMON INTERFACES GENERAL INFORMATION
This is very useful for reading contiguous memory quickly
Often times, TS engineers can accomodate your
www.embeddedARM.com
allow IRQ
33

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