Panasonic KX-P7100 Service Manual page 55

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KX-P7100
4.4.5.
ASIC ( KME )
(A) This block is the serial communication interface with the Engine CPU ( IC11 ).
(B) This block is the interface with the GDI Controller CPU ( IC1 ).
(C) This block is the Stepping Motor Controller ( CH0 ) to control the main motor.
(D) This block is another Stepping Motor Controller ( CH1 ), and it is not used for this model.
(E) This block is the LSU Controller, and it consists of laser enable, power adjust and video data.
(F) This block generates 12 MHz clock signal and supply to the peripheral devices.
(G) This block is the interface with USB chip ( IC8 ), and consists of 8-bit data bus and control signals.
(H) This block is the Centronics interface, and consists of 8-bit data bus and control signals.
( I ) This block is the interface with D6004 ASIC ( IC3 ).
(J) This block is the interface with DRAM.
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