Yamaha DSP-E800 Service Manual page 25

IC3 : YSD917 (DIR5)
Digital Format Interface Receiver
AVDD 1
PCO
2
AVSS
3
M/S
4
DDIN
5
TEST
6
/IC
7
TOP VIEW
VSS
8
XO
9
XI
10
MCK
11
VDD
12
SDO
13
SDBCK
14
Pin Pin
I/O
No. Name
1 AVDD Power supply
2 PCO I/O PLL phase comparison output
3 AVSS Ground
4 M/S I Unconnected
5 DDIN I Digital audio data input
6 TEST Unconnected
7 /IC I Initial clear input from microcomputer
8 VSS Ground
9 XO O Crystal oscillator connection (24.576MHz)
10 XI I Crystal oscillator connection (24.576MHz)
11 MCK O Master clock output for AC3D2av
12 VDD Power supply
13 SDO O Serial audio data output for AC3D2av
14 SDBCK I/O 64fs bit clock output for microcomputer,
CODEC, DAC
15 SDWCK I/O 1fs word clock output for microcomputer,
CODEC, DAC
16 SDMCK O 256fs bit clock output for microcomputer,
CODEC, DAC
22
28 SCK
SI
27
SO
26
/CS
25
VDD
24
DDIN
5
INT
23
/LOCK
22
ERR
21
DBL
20
EACH CONTROL
FS128
19
/IC 7
SYNC
18
VSS
17
MICROPROCESSOR
SDMCK
16
INTERFACE
SDWCK
15
26 25
Function
2 10 9 11
STANDARD
CLOCK
CLOCK
GENERATION
PLL
SYSTEM
SELECTION
DATA BUS FRAME SERIAL
BUFFER CONVERSION
SIGNAL
INTERRUPT
CHANNEL
FACTOR
STATUS
USER DATA DETECTION
27 28
Pin Pin
I/O
No. Name
17 VSS Ground
18 SYNC O Unconnected
19 FS128 O Unconnected
20 DBL O Double speed sampling mode selection data
output for microcomputer, CODEC, DAC
21 ERR O Unconnected
22 /LOCK O Unconnected
23 INT O Interrupt factor detect output for
microcomputer
24 VDD Power supply
25 /CS I Chip select input from microcomputer
26 SO O Serial data output for microcomputer
27 SI I Serial data input for microcomputer
28 SCK I Serial clock input from microcomputer
DSP-E800
4
16 SDMCK
OUTPUT
SDWCK
15
CLOCK
14 SDBCK
GENERATION
SYNC
18
FS128
19
OUTPUT
SELECTION DBL
20
21 ERR
13 SDO
23
Function
22