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29
VRD/BCS
30
FBLIN1
31
RIN1
32
GIN1
33
BIN1
34
FBLIN2
35
RIN2
36
GIN2
37
BIN2
38
TEST
39
RESQ
40
PWM1
41
PWM2
42
HCS
43
C0
44
C1
45
C2
46
C3
47
C4
48
C5
49
C6
50
C7
51
VSUPD
52
GNDD
53
LLC2
54
Y0
55
Y1
56
Y2
57
Y3
58
Y4
59
Y5
60
Y6
61
Y7
62
LLC1
63
HS
64
VS
65
XTALK2
66
XTALK1
67
SDA
68
SCL
14.9.SDA5550
14.9.1.General definition
The SDA5550M is a single chip teletext decoder for decoding World System Teletext data as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling
(WSS) data used for PAL plus transmissions (Line 23). The device provides an integrated general-
purpose,
fully
8051-compatible
Microcontroller has been enhanced to provide powerful features such as memory banking, data
pointers, and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data can
also be used for customer defined on screen displays. Internal XRAM consists of up to 17 Kbytes. This
device can support external memory up to 1Mbyte ROM and RAM.TVTEXT Controller contains a data
slicer for VPS, WSS, PDC and TXT, an acceleration acquisition hardware module, a display generator
for Level 1.5 TXT and powerful On screen Display capabilities based on parallel attributes, and pixel
oriented characters (DRCS). The 8 bit Microcontroller operates at 360nsec cycle time (min). Controller
with dedicated hardware does most of the internal TXT acquisition processing, transfer data to/from
external memory interface and receives/transmits data via I
realized in 0.25 micron technology with 2.5V supply voltage and 3.3V I/O compatible. The IC produces
the following input or output control signals; AGC_CON, MODE_SW,
ON/OFF (stand-by), SC1..3_IN_AV (pin 8 information from 3 SCARTs), AFC, MUTE (to mute audio
2
output IC), I
CEN.
IN
X
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDO
IN
GNDD
IN
X
OUT
LV
OUT
LV
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
SUPPLY
X
SUPPLY
X
IN
X
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
GNDD
IN
VSUPD
IN
X
IN
GNDD
OUT
X
IN
X
IN/OUT
X
IN/OUT
X
Microcontroller
14
DAC Reference, Beam Current Safety
Fast-Blank1 Input
Analog Red1 Input
Analog Green1 Input
Analog Blue1 Input
Fast-Blank2 Input
Analog Red2 Input
Analog Green2 Input
Analog Blue2 Input
Test Pin
Reset Input, active low
2
I
C-controlled DAC
2
I
C-controlled DAC
Half-contrast
Picture Bas Chroma (LSB)
Picture Bas Chroma
Picture Bas Chroma
Picture Bas Chroma
Picture Bas Chroma
Picture Bas Chroma
Picture Bas Chroma
Picture Bas Chroma (MSB)
Supply Voltage, Digital Circuitry
Ground, Digital Circuitry
System Clock Input (27/32/40.5 MHz)
Picture Bas Luma (LSB)
Picture Bas Luma
Picture Bas Luma
Picture Bas Luma
Picture Bas Luma
Picture Bas Luma
Picture Bas Luma
Picture Bas Luma (MSB)
Single Line-Locked Clock Input (13.5/16 MHz)
Horizontal Sync Input
Vertical Sync Input
Analog Crystal Output (5-MHz Security Clock)
Analog Crystal Input (5-MHz Security Clock)
2
I
C-Bus Data
2
I
C-Bus Clock
with
television
specific
2
C-firmware user interface. SDA5550M is
L / L', PIP_MODS, PIP_SEL,
hardware
features.
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