Drx3960A; Introduction; Features; Pin Connection And Short Descriptions - Toshiba 29VH27E Service Manual

14.15.DRX3960A

14.15.1.Introduction

The Digital Receiver Front -end DRX 3960A performs the entire multi-standard Quasi Split Sound (QSS)
TV IF processing, AGC, video demodulation, and generation of the second sound IF (SIF) with only one
SAW filter. The IC is designed for applications in TV sets, VCRs, PC cards, and TV tuners. The
alignment-free DRX 3960A needs no special external components. All control functions and status
registers are accessible via I
standardized IF stages. Due to its mixed signal structure and the digital demodulation, the IC offers
unique features and is prepared for digital TV.

14.15.2.Features

– Multi-standard QSS IF processing with a single SAW
– Highly reduced amount of external components (no tank circuit, no potentiometers, no SAW
switching)
– Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 36.125 MHz etc.)
– Digital IF processing for the following standards: B/G, D/K, I, L/L', and M/N
– Standard specific digital post filtering
– Standard specific digital video/audio splitting
– Standard specific digital picture carrier recovery:
– alignment-free
– Quartz-stable and accurate
– Stable frequency lock at 100% modulation and over modulation up to 115%
– Quartz-accurate AFC information
– Programmable standard specific digital group delay equalizing
– Automatically frequency-adjusted Nyquist slope, therefore optimal picture and sound performance
over complete lock in frequency range
– Standard specific digital AGC and delayed tuner AGC with programmable tuner Take Over Point
– Fast AGC due to linear structure
– Adaptive back porch control, therefore fast positive modulation AGC
– No sound traps needed at video output
– Second SIF output with standard dependent pre-filtering and amplitude controlled output level
– Optimal sound SNR due to carrier recovery without quadrature distortions
– FM radio capability without external components and with standard TV tuner
– Prepared for digital TV (DVB-C, DVB-T, ATSC)
2
– I C bus interface

14.15.3.Pin connection and short descriptions

NC = not connected, leave vacant
DVSS = if not used, connect to DVSS
X = obligatory; connect as described in circuit diagram
Pin no Pin name
PLCCK 68 pin
1 AVSS_ADC
2 AVDD_ADC
3 ANASTX
4 ANASTY
5 AVDD_FE8
6 AVSS_FE8
7 AVSS_FE40
8 IFINX
9 AVDD_FE40
10 IFINY
11 AVSS_FE40
12 AVDD_SYN
13 AVSS_SYN
14 SHIELD
15 TEST0
16 TEST1
17 TEST2
2
C bus interface. Therefore, it simplifies the design of high-quality, highly
Type
Supply
Voltage
I/O AVDD_FE8
I/O AVDD_FE8
IN AVDD_FE40
IN AVDD_FE40
IN
IN AVDD_DAC
IN AVDD_DAC
IN AVDD_DAC
22
LV = if not used, leave vacant
AHVSS = connect to AHVSS
Connection Short description
(if not used)
X Analog Ground for ADC
X Analog Supply for ADC (+5V)
GND Test pin
GND Test pin
X 2nd analog supply for the front-end
X 2nd analog ground for the front-end
1st analog ground for the front-end
X IF Input
X 1st analog supply for the front-end
X IF Input
X 1st analog ground for the front-end
X Analog supply for synthesizer (+5V)
X Analog ground for synthesizer
X Shield GND
GND Test pin
GND Test pin
GND Test pin