Ddp3310; Description; Features; Pin Connection And Short Descriptions - Toshiba 29VH27E Service Manual

• Output Adjustable between 1.2 V and 37 V
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting Constant with Temperature
• Output Transistor Safe–Area Compensation
• Floating Operation for High Voltage Applications
• Available in Surface Mount D
• Eliminates Stocking many Fixed Voltages

14.8.DDP3310

14.8.1.Description

The DDP 3310B is a single-chip digital Display and Deflection Processor designed for high-quality
back-end applications in 100/120-Hz TV sets with 4:3 or 16:9 picture tubes. The IC can be combined
with members of the DIGIT 3000 IC family (VPC 32xx, TPU 3040), or it can be used with third-party
products. The IC contains the entire digital video component and deflection processing and all analog
interface components.

14.8.2.Features

Video processing
– linear horizontal scaling (0.25 ... 4)
– non-linear horizontal scaling "panorama-vision"
– dynamic peaking
– soft limiter (gamma correction)
– color transient improvement
– programmable RGB matrix
– picture frame generator
– two analog RGB/Fast-Blank inputs. The DDP 3310B is a single-chip digital Display and Deflection
Processor designed for high-quality back-
Deflection processing
– scan velocity modulation output
– high-performance H/V deflection
– EHT compensation for vertical / East/West
– soft start/stop of H-Drive
– vertical angle and bow
– differential vertical output
– vertical zoom via deflection
– horizontal and vertical protection circuit
– adjustable horizontal frequency for VGA/SVGA display
Miscellaneous
– selectable 4:1:1/ 4:2:2 YC
– selectable 27/ 32-MHz line-locked clock input
– crystal oscillator for horizontal protection
– automatic picture tube adjustment (cutoff, white-drive)
– single 5-V power supply
– hardware for simple 50/60-Hz to 100/ 120-Hz conversion (display frequency doubling)
2
– two I C-controlled PWM outputs
– beam current limiter

14.8.3.Pin connection and short descriptions

NC = not connected
X = obligatory; connect as described in circuit diagram
OUT = Output
Pin no Pin name
PLCCK 68 pin
1 VSUPP
2 GNDP
3 VS2
4 FIFORRD
2
PAK, and Standard 3–Lead Transistor Package
C input
r b
Type Connection
(if not used)
SUPPLY X
SUPPLY X
IN GNDD
OUT LV
LV = if not used, leave vacant
IN = Input
SUPPLY = Supply Pin
Short description
Supply voltage, Output pin driver
Ground, Output pin driver
Additional VSYNC input
FIFO Read counter reset
12