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IMAGE SENSOR SOLUTIONS
NOTES:
1.
The H1A_CCD, H1B_CCD, H2A_CCD, and H2B_CCD low levels are controlled by the same potentiometer (R146).
2.
The H1A_CCD, H1B_CCD, H2A_CCD, and H2B_CCD high levels are controlled by the same potentiometer (R129).
3.
V1_CCD and V2_CCD low levels are controlled by the same potentiometer (R66)
4.
V1_CCD and V2_CCD mid levels are controlled by the same potentiometer (R107)
5.
The KAI-2093 has no Fast Dump Gate; CCD pin 11 is 0.0V. To accomplish this, R91 is removed, and R79 is installed.
Reset Clock Pulse Width
The pulse width of RESET_CCD may be set by
configuring P[2..0], the inputs to the programmable
one-shot U13. P[2..0] can be tied high or low to
achieve the desired pulse width by populating the
resistors
R156,
accordingly.
Pulse Width
15ns
5ns
7.5ns
10ns
M T D / P S - 0 7 1 5
w w w . k o d a k . c o m / g o / i m a g e r s
R157,
R160,
and
P0
P1 P2 R156 R157
0
0
0
IN
1
0
0
OUT
0
1
0
IN
1
1
0
OUT
Table 5: Reset Clock Pulse Width
5 8 5 - 7 2 2 - 4 3 8 5
This feature is optional, as the RESET pulsewidth
may also be controlled from the Timing Board. In
that case, U13 is removed, and R147 is installed
to bypass this circuitry.
R161
R160
R161
OUT
IN
OUT
IN
IN
OUT
OUT
OUT
IN
IN
OUT
IN
F a x : 5 8 5 - 4 7 7 - 4 9 4 7
P a g e 8 o f 3 1
Notes
Default Setting
R e v i s i o n 4 . 0
E m a i l : i m a g e r s @ k o d a k . c o m
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