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IMAGE SENSOR SOLUTIONS
KODAK KAI-2001/KAI-2020/KAI-2093
CCD IMAGE SENSORS
IMAGER EVALUATION BOARD
USERS MANUAL
Revision 4.0
April 18, 2005
M T D / P S - 0 7 1 5
R e v i s i o n 4 . 0
w w w . k o d a k . c o m / g o / i m a g e r s
5 8 5 - 7 2 2 - 4 3 8 5
F a x : 5 8 5 - 4 7 7 - 4 9 4 7
E m a i l : i m a g e r s @ k o d a k . c o m
P a g e 1 o f 3 1
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Table of Contents
Related Manuals for Kodak KAI-2001
Summary of Contents for Kodak KAI-2001
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Page 1: Users Manual
IMAGE SENSOR SOLUTIONS KODAK KAI-2001/KAI-2020/KAI-2093 CCD IMAGE SENSORS IMAGER EVALUATION BOARD USERS MANUAL Revision 4.0 April 18, 2005 M T D / P S - 0 7 1 5 R e v i s i o n 4 . 0 w w w . -
Page 2: Table Of Contents
Table 6: J4 Interface Connector Pin Assignments ................11 FIGURES Figure 1. KAI-2001/KAI-2020/KAI-2093 Imager Board Block Diagram ........... 9 Figure 2. Measured Performance -- Dynamic Range and Noise Floor ..........10 M T D / P S - 0 7 1 5 R e v i s i o n 4 . -
Page 3: Kai-2001/Kai-2020/Kai-2093 Imager Evaluation Board Description
Imager The Imager Board has been designed to operate Evaluation Board, referred to in this document as the KAI-2001, KAI-2020, and KAI-2093 CCDs with the Imager Board, is designed to be used as part the specified performance at nominal operating of a two-board set, used in conjunction with a conditions. -
Page 4: Table 2: Signal Level Requirements
IMAGE SENSOR SOLUTIONS Input Signals (LVDS) Vmin Vthreshold Vmax Units Signal Comments IMAGER_IN0 +/- 0.1 AMP_ENABLE Output Amplifier Enable IMAGER_IN1 +/- 0.1 H1A clock IMAGER_IN2 +/- 0.1 H1B clock IMAGER_IN3 +/- 0.1 H2A clock IMAGER_IN4 +/- 0.1 H2B clock IMAGER_IN5 +/- 0.1 RESET Reset clock... -
Page 5: Kai-2001/Kai-2020/Kai-2093 Imager Board Architecture Overview
IMAGE SENSOR SOLUTIONS KAI-2001/KAI-2020/KAI-2093 IMAGER BOARD ARCHITECTURE OVERVIEW The following sections describe the functional blocks of the Imager board (refer to Figure 1). The V1 clock driver is a 2-level driver circuit, Power Filtering And Regulation switching between VMID amd VLOW voltage Power is supplied to the Imager Board via the J4 levels. -
Page 6: Esd Bias Voltage
2001, KAI-2020, and KAI-2093 Interline CCD multiplexer is controlled by the VIDEO_MUX image sensors. signal. This circuitry is for Kodak use only, and is not enabled. M T D / P S - 0 7 1 5 R e v i s i o n 4 . 0 w w w . -
Page 7: Kai-2001/Kai-2020/Kai-2093 Operational Settings
IMAGE SENSOR SOLUTIONS KAI-2001/KAI-2020/KAI-2093 OPERATIONAL SETTINGS The Imager board is configured to operate the KAI-2001/KAI-2020/KAI-2093 CCD image sensor under the following operating conditions: DC Bias Voltages The following voltages are fixed, or adjusted with a and Max voltages in the table indicate the potentiometer as noted. -
Page 8: Reset Clock Pulse Width
IMAGE SENSOR SOLUTIONS NOTES: The H1A_CCD, H1B_CCD, H2A_CCD, and H2B_CCD low levels are controlled by the same potentiometer (R146). The H1A_CCD, H1B_CCD, H2A_CCD, and H2B_CCD high levels are controlled by the same potentiometer (R129). V1_CCD and V2_CCD low levels are controlled by the same potentiometer (R66) V1_CCD and V2_CCD mid levels are controlled by the same potentiometer (R107) The KAI-2093 has no Fast Dump Gate;... -
Page 9: Block Diagram And Performance Data
REGULATOR J4 BOARD INTERFACE CONNECTOR P1 DAC CONNECTOR (optional) Figure 1. KAI-2001/KAI-2020/KAI-2093 Imager Board Block Diagram M T D / P S - 0 7 1 5 R e v i s i o n 4 . 0 w w w . k o d a k . c o m / g o / i m a g e r s... -
Page 10: Figure 2. Measured Performance -- Dynamic Range And Noise Floor
IMAGE SENSOR SOLUTIONS Photon Transfer Slope = el/Adu = 9.19 electrons Noise floor = 2.47 counts (22.7 electrons) LVSAT = 32027 electrons VSAT = 35758 electrons 1000 10000 100000 Signal Mean (Electrons) Figure 2. KAI-2020 Measured Performance -- Dynamic Range and Noise Floor M T D / P S - 0 7 1 5 R e v i s i o n 4 . -
Page 11: Connector Assignments And Pinouts
IMAGE SENSOR SOLUTIONS CONNECTOR ASSIGNMENTS AND PINOUTS SMB Connectors J1, J2 and J3 The emitter-follower buffered VOUT_LEFT and to the Timing Generator Board to match the series VOUT_RIGHT signals are driven from the Imager and terminating resistors used on these boards. Board via the SMB connectors J3 and J2, J1 is an auxiliary SMB connector driven from a respectively. -
Page 12: Warnings And Advisories
The Imager Board described in this document is designed to be used as part of a two-board set, in conjunction with a Timing Generator Board. Kodak offers an Imager Board / Timing Generator Board package that has been designed and configured to operate with the KAI-2001, KAI-2020, and KAI-2093 CCD image sensors. -
Page 13: Appendices
IMAGE SENSOR SOLUTIONS APPENDICES KAI-2001/KAI-2020/KAI-2093 Imager Board Schematics M T D / P S - 0 7 1 5 R e v i s i o n 4 . 0 w w w . k o d a k . c o m / g o / i m a g e r s...