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IMAGE SENSOR SOLUTIONS
TABLE OF CONTENTS
IMAGER BOARD INPUT REQUIREMENTS .................................................................. 3
CCD FDG DRIVER..................................................................................................................................... 5
VSUB/VES CIRCUIT.................................................................................................................................. 5
V
V
............................................................................................................................................... 6
KAI-2001/KAI-2020/KAI-2093 OPERATIONAL SETTINGS .......................................... 7
V
V
BLOCK DIAGRAM AND PERFORMANCE DATA......................................................... 9
CONNECTOR ASSIGNMENTS AND PINOUTS .......................................................... 11
WARNINGS AND ADVISORIES .................................................................................. 12
REFERENCES.............................................................................................................. 12
GLOSSARY OF ABBREVIATIONS.............................................................................. 12
REVISION HISTORY .................................................................................................... 12
APPENDICES ............................................................................................................... 13
TABLES
Table 1: Power Requirements.................................................................................................................... 3
Table 2: Signal Level Requirements ......................................................................................................... 4
Table 3: DC Bias Voltages.......................................................................................................................... 7
Table 4: Clock Voltages.............................................................................................................................. 7
Table 5: Reset Clock Pulse Width ............................................................................................................. 8
Table 6: J4 Interface Connector Pin Assignments ................................................................................ 11
FIGURES
Figure 1. KAI-2001/KAI-2020/KAI-2093 Imager Board Block Diagram ................................................... 9
Figure 2. Measured Performance -- Dynamic Range and Noise Floor ................................................ 10
M T D / P S - 0 7 1 5
w w w . k o d a k . c o m / g o / i m a g e r s
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J3............................................................................................................. 11
J4 ............................................................................................................ 11
5 8 5 - 7 2 2 - 4 3 8 5
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F a x : 5 8 5 - 4 7 7 - 4 9 4 7
P a g e 2 o f 3 1
R e v i s i o n 4 . 0
E m a i l : i m a g e r s @ k o d a k . c o m
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